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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 46 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 46 Page - Toshiba Semiconductor |
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46 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-44 (2) Register configuration (CPU control registers) Channel0 DMAS0 Transfer source address register 0 DMAD0 Transfer destination address register 0 DMAC0 Transfer counter register 0 DMAM0 Transfer mode register 0 Channel1 DMAS1 Transfer source address register 1 DMAD1 Transfer destination address register 1 DMAC1 Transfer counter register 1 DMAM1 Transfer mode register 1 Channel2 DMAS2 Transfer source address register 2 DMAD2 Transfer destination address register 2 DMAC2 Transfer counter register 2 DMAM2 Transfer mode register 2 Channel3 DMAS3 Transfer source address register 3 DMAD3 Transfer destination address register 3 DMAC3 Transfer counter register 3 DMAM3 Transfer mode register 3 These control registers can only be set with the “LDC cr, r” instruction. Example: LD XWA, 100H LDC DMAS0, XWA LD XWA, 50H LDC DMAD0, XWA LD WA, 40H LDC DMAC0, WA LD A, 05H LDC DMAM0, A (Use only lower 24 bits.) (1 to 65536) 8 bits 16 bits 32 bits |
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