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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 161 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 161 Page - Toshiba Semiconductor |
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161 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-159 Figure 3.10.7 Connection between Timer and Pattern Generator (1) Pattern generation mode When PG01CR<PAT0> = “1”, PG functions as a pattern generator. In this mode data is written from the CPU to the shift alternate register only. The pattern data is then written from the shift alternate register to the pattern generator register synchronized to the shift trigger interrupt from the timer. In this mode, PG01CR<PG0M> should be set to “1”, PG01CR<CCW0> to “0”, and PG01CR<PG0TE> to “1”. The output from the pattern generator goes to port 6; since port or functions can be switched by the bit settings in the port function control register, P6FC, any port pin can be assigned to pattern generator output. Figure 3.10.8 shows the block diagram for this mode. Example of Pattern Generation Mode 8-bit timer (Timers 0 and 1) 16-bit timer 4 16-bit timer 5 Select A BS Select A BS <PG0T> <PG1T> PG0 PG1 Port 60 to 63 Port 64 to 67 n + 1 n n + 2 n + 3 n − 1 Trigger signal from timer/ timer interrupt Shift alternate register output (SA03 to SA00) Pattern generator register output (PG03 to PG00) n n + 1 n + 2 n − 1 Shifting data from SA03 to 00 to PG03 to PG00 Writing data to SA03 to SA00 on timer interrupt |
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