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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 24 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 24 Page - Toshiba Semiconductor |
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24 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-22 (2) Clock gear controller When the high-frequency clock fc is selected at SYSCR1<SYSCK> = “0”, the clock gear select register SYSCR1<GEAR2:0> sets fFPH to either fc, fc/2, fc/4, fc/8, or fc/16. Switching fFPH with the clock gear reduces the power consumption. Clock setting example 3: Changing gear value of the high-frequency clock SYSCR1 EQU 006FH LD (SYSCR1), XXXX0000B ; Changes fSYS to fc/2. X: Don’t care (High-frequency clock gear changing) To change the frequency of the clock gear, write the value to the SYSCR1<GEAR2:0> register. It is necessary to continue the warm-up time until changing fFPH after writing the register value. There is a possibility that the instruction immediately following the clock-gear-changing instruction will be executed by the clock gear before executing its gear change. To ensure that the instruction immediately following the clock-gear-changing instruction will only be executed by the clock gear after changing its gear ratio, input a dummy instruction (An instruction to execute a write cycle) as follows. Example: Instruction to be executed by the clock gear after changing its gear ratio. SYSCR1 EQU 006FH LD (SYSCR1), XXXX0001B ; Changes fSYS to fc/4. LD (DUMMY), 00H ; Dummy instruction. Instruction to be executed by the clock gear after changing. |
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