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TMP93CS41 датащи(PDF) 95 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 95 Page - Toshiba Semiconductor |
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95 / 248 page ![]() TMP93CS40/TMP93CS41 20004-02-10 93CS40-93 3.6.5 Example of Usage (1) Example of usage -1 Figure 3.6.1 is an example in which an external memory is connected to the TMP93CS41. In this example, a ROM is connected using a 16-bit bus; a RAM is connected using an 8-bit bus. Figure 3.6.1 Example of External Memory Connection (ROM = 16 bits, RAM and I/O = 8 bits) Resetting sets pins CS0 to CS2 to input port mode. CS0 and CS1 are set high due to an internal pull-up resistor; CS2 is set low due to an internal pull-down resistor. The program used to set these pins is as follows. P4CR EQU 0EH P4FC EQU 10H B0CS EQU 68H B1CS EQU 69H B2CS EQU 6AH LD (B0CS), 1X010000B ; CS0 = 8 bits, 2 waits, 7F00H to 7FFFH LD (B1CS), 1X011100B ; CS1 = 8 bits, 0 waits, 880H to 7EFFH LD (B2CS), 1X000100B ; CS2 = 16 bits, 1 wait, 8000H to 3FFFFFH LD (P4CR), XXXXX111B LD (P4FC), XXXXX111B X: Don’t care CS0 , CS1 , CS2 output mode setting Upper byte ROM TMP93CS41 74HC573 CS0 CS1 CS2 ALE AD8 AD15 AD0 AD7 RD WR D Q LE D Q LE Address Bus EA AM8/ AM16 OE Lower byte ROM to 8-bit bus RAM 8-bit bus I/O to WE CS CS CS CS OE OE OE WE |
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