TMP93CS41 datasheet(57/248 Pages) TOSHIBA

57 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-55

Table 3.5.3 I/O Registers and Specifications (2/2)

I/O Register

Port No.

Pin No.

Function

PnCR

PnFC

Input port (without PU)

Input port (with PU)

P70 to P73

Output port

TI0 input (without PU)

P70

TI0 input (with PU)

None

P71

TO1 output

P72

TO2 output

Port 7

P73

TO3 output

Input port (without PU)

Input port (with PU)

P80 to P87

Output port

TI4/INT4 input (without PU)

P80

TI4/INT4 input (with PU)

None

TI5/INT5 input (without PU)

P81

TI5/INT5 input (with PU)

None

TI6/INT6 input (without PU)

P84

TI6/INT6 input (with PU)

None

TI7/INT7 input (without PU)

P85

TI7/INT7 input (with PU)

None

P82

TO4 output

P83

TO5 output

P86

TO6 output

INT0 input (without PU)

Port 8

P87 (Note 5)

INT0 input (with PU)

None

Input port (without PU)

Input port (with PU)

P90 to P95

Output port

P90

TXD0 output

P93

TXD1 output

RXD0 input (without PU)

P91

RXD0 input (with PU)

None

RXD1 input (without PU)

P94

RXD1 input (with PU)

None

SCLK0 output

CTS0/SCLK0 input (without PU)

P92

CTS0/SCLK0 input (with PU)

SCLK1 output

SCLK1 input (without PU)

P95

SCLK1 input (with PU)

Input port

Output port (Note 6)

Port 9

P96 to P97

XT1/2 (Note 7)

None

Input port

PA0 to PA7

Output port

Port A

PA7

SCOUT output (Note 8)

None

×: Don’t care

Note 5: When the P87 pin is used as INT0, the IIMC register has to be set to enable interrupt.

Note 6: When using P96 to P97 as output ports, output goes through the open-drain buffer.

Note 7: When P96 to P97 are used as XT1 to XT2, the SYSCR0<XTEN> has to be set to “1”.

Note 8: When PA7 is used as SCOUT, the PACR and CKOCR must have the appropriate values written to them.

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