TMP93CS41 datasheet(92/248 Pages) TOSHIBA

92 / 248 page

TMP93CS40/TMP93CS41

20004-02-10

93CS40-90

(5) Address area specification

Control register bits 1 and 0 <B0C1:0, B1C1:0, and B2C1:0> are used to specify the

target address area. Setting these bits to 00 enables settings (e.g., CS output, wait

state, and bus size) as follows:

* The CS0 setting is enabled when the address space 7F00H to 7FFFH is accessed.

* The CS1 setting is enabled when the address space 880H to 7FFFH is accessed.

* The CS2 setting is enabled when the address space 8000H to 3FFFFFH is accessed

in the TMP93CS41, which does not have a built-in ROM.

The CS2 setting is enabled when the address space 18000H to 3FFFFFH is accessed

in the TMP93CS40, which has built-in ROM.

Setting these bits to 01 enables settings ( CS output, wait state...) for all CS’s blocks

and outputs a low strobe signal (from CS0 to CS2 , or from

CAS

) from the

chip select pins when the address space 400000H to 7FFFFFH is accessed. Setting

these bits to 10 enables the address space 800000H to BFFFFFH to be accessed.

Setting these bits to 11 enables the address space C00000H to FFFFFFH to be

accessed.

Table 3.6.1 Chip Select/Wait Control Register

Code

Name

Address

B0E

B0CAS

B0BUS

B0W1

B0W0

B0C1

B0C0

B0CS

Block0

CS/WAIT

control

0068H

1: Master bit

of bit0 to 6

0: CS0

CAS

0: 16-bit

bus

1: 8-bit

bus

00: 2 waits

01: 1 wait

10: (1

+ n) waits

11: 0 waits

00: 7F00H to 7FFFH

01: 400000H to

10: 800000H to

11: C00000H to

B1E

B1CAS

B1BUS

B1W1

B1W0

B1C1

B1C0

B1CS

Block1

CS/WAIT

control

0069H

1: Master bit

of bit0 to 6

0: CS1

CAS

0: 16-bit

bus

1: 8-bit

bus

00: 2 waits

01: 1 wait

10: (1

+ n) waits

11: 0 waits

00: 880H to 7FFFH

01: 400000H to

10: 800000H to

11: C00000H to

B2E

B2CAS

B2BUS

B2W1

B2W0

B2C1

B2C0

B2CS

Block2

CS/WAIT

control

006AH

1: Master bit

of bit0 to 6

0: CS2

CAS

0: 16-bit

bus

1: 8-bit

bus

00: 2 waits

01: 1 wait

10: (1

+ n) waits

11: 0 waits

00: 8000H to

01: 400000H to

10: 800000H to

11: C00000H to

Note: Read-modify-write is prohibited for B0CS, B1CS, and B2CS.

TMP93CS41 датащи(PDF) 92 Page - Toshiba Semiconductor

TMP93CS41 датащи(HTML) 92 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL