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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 112 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 112 Page - Toshiba Semiconductor |
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112 / 248 page  TMP93CS40/TMP93CS41 20004-02-10 93CS40-110 Example: Generating 1/4 duty 62.5 kHz pulse (at fc = 20 MHz) Clock condition System clock: High frequency (fc) Clock gear: 1 (fc) Prescaler clock: fFPH • Calculate the value to be set in the timer register. To obtain a frequency of 62.5 kHz, the pulse cycle time t should be: t = 1/62.5 kHz = 16 µs. Given φT1 = 0.4 µs (at 20 MHz), 16 µs ÷ 0.4 µs = 40 Consequently, set the timer register 1 (TREG1) to TREG1 = 40 = 28H and then to obtain a duty of 1/4, t × 1/4 = 16 µs × 1/4 = 4 µs 4 µs ÷ 0.4 µs = 10 Therefore, set timer register 0 (TREG0) to TREG0 = 10 = 0AH. 7 6 5 4 3 2 1 0 TRUN ← − X − − − − 0 0 Stop timers 0 and 1, and clear then. TMOD ← 1 0 X X X X 0 1 Set the 8-bit PPG mode, and select φT1 as input clock. TREG0 ← 0 0 0 0 1 0 1 0 Write “0AH”. TREG1 ← 0 0 1 0 1 0 0 0 Write “28H”. TFFCR ← − − − X 0 1 1 X Set TFF1 and enable the inversion. Writing “10” provides negative logic pulse. P7CR ← X X X X − − 1 − P7FC ← X X X X −− 1X Set P71 as the TO1 pin. TRUN ← 1 X − − − − 1 1 Start timer 0 and timer 1 counting. X: Don’t care, −: No change 16 µs |
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