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AD9927BBCZ датащи(PDF) 63 Page - Analog Devices |
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AD9927BBCZ датащи(HTML) 63 Page - Analog Devices |
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63 / 100 page ![]() AD9927 Rev. 0 | Page 63 of 100 GP LOOK-UP TABLES (LUT) The AD9927 is equipped with a look-up table for each pair of consecutive GP signals when configured as outputs. GP1 is always combined with GP2, GP3 is always combined with GP4, GP5 is always combined with GP6, and GP7 is always combined with GP8. The external GPO outputs from each pair can output the result of the LUT or the original GP internal signal. GP1 LUT 1 0 0 1 GPO2 GPO1 GP2 GP2_USE_LUT GP1_USE_LUT Figure 76. Internal LUT for GP1 and GP2 Signals Address 0x79 dictates the behavior of the LUT and which signals receive the result. Each 4-bit LUT_FOR_GPxy register can realize any logic combination of GPx and GPy. For example, Table 43 shows how the register values of LUT_FOR_GP12 [11:8] are determined. XOR, NAND, AND, and OR results are shown, but any 4-bit combination is possible. A simple example of XOR gating is shown in Figure 77. Table 43. LUT Results Based on GP1, GP2 Values GP2 GP1 LUT: XOR LUT: NAND LUT: AND LUT: OR 0 0 0 1 0 0 0 1 1 1 0 1 1 0 1 1 0 1 1 1 0 0 1 1 GP1 GP2 GPO2 NOTES 1. LOGIC COMBINATION (XOR) OF PROGRAMMED TOGGLES GP1 AND GP2. LUT_FOR_GP12[11:8] = 0x06 GP2_USE_LUT = 1 GP1_USE_LUT = 0 GPO1 Figure 77. LUT Example for GP1 XOR GP2 Field Counter and GPO Limitations The following is a summary of the known limitations of the field counters and GPO signals that dictate usability. • The field counter trigger (PRIMARY_ACTION and SECONDARY_ACTION registers, Address 0x70) is self-reset at the start of every VD period. Therefore, there must be one VD period between sequential programming to that address. • If GP*_PROTOCOL = 1, it must be manually reset to GP*_PROTOCOL = 0 one VD period before it can be used again. If manual toggles are desired in sequential fields, the MANUAL_TRIG register should be used in conjunction with GP*_PROTOCOL = 1. |
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