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AD9927BBCZ датащи(PDF) 40 Page - Analog Devices

номер детали AD9927BBCZ
подробное описание детали  14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator
PDF  100 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9927BBCZ датащи(HTML) 40 Page - Analog Devices

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AD9927
Rev. 0 | Page 40 of 100
Special Pattern Insertion
Additional flexibility is available using the SPC_PAT_EN registers,
which allows a Group B, C, or D pattern to be inserted into a series
of Group A repetitions. This feature is useful when a different
pattern is needed at the start, middle, or end of a sequence.
Figure 47 shows an example of a sweep region using VPATA
with multiple repetitions where a single repetition of VPATB has
been added into the middle of the sequence. Figure 48 shows
more detail on how to set the registers to achieve the desired
timing.
Note that VREPB is used to specify which repetition number
has the special pattern inserted instead of VPATA. VPATB
always has priority over VPATC or VPATD if more than one
SPC_PAT_EN bit is enabled (SPC_PAT_EN [0] has priority).
VD
XV1 TO XVN
HD
REGION 1: SWEEP REGION
LINE 0
LINE 1
REGION 0
REGION 2
LINE 24
LINE 25
LINE 2
SCP1
SCP2
PATTERN B INSERTED DURING PATTERN A REPETITIONS
Figure 47. Example of Special Pattern Insertion
XV1
HD
V-PATTERN A
V-PATTERN B
V-PATTERN A
REP 1
REP 2
REP N
REP 5
REP 4
REP 3
REGISTER SETTINGS:
DESCRIPTION:
SPC_PAT_EN[0] = 1
V-PATTERN B IS USED AS SPECIAL PATTERN
VREPA = N
TOTAL NUMBER OF REPS USED FOR SEQUENCE (N REPS)
VREPB = 4
REP 4 USES V-PATTERN B INSTEAD OF V-PATTERN A
NOTES
1. VSTARTB MUST BE SET EQUAL TO VSTARTA.
Figure 48. Example of Special Pattern Insertion, Detail



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