TMPR4955AF datasheet(103/168 Pages) TOSHIBA

103 / 168 page

Chapter 6 TX4955A System Interface

6-31

6.2.12

System Interface Addresses

System interface addresses are complete 32-bit physical addresses. They are sent to the

lower 32 bits of the SysAD bus during the address cycle.

6.2.12.1 Addressing rules in the 32-bit bus mode

Addresses that are to be used in word or partial word transactions are arranged to

match the size of the data element. The following rules are used by this system.

•

Target addresses of the block request are aligned to the word boundaries. In

other words, the lower 2 bits of the address become “0”.

•

Word requests set the lower 2 bits of the address to “0”.

•

Half-word requests set the least significant bit of the address to “0”.

•

Byte requests and 3-byte requests use the byte address.

6.2.13

Mode Register of System Interface (G2Sconfig)

The Mode Register of System Interface ( G2Sconfig ) is a read/write register. This

Table 6.2.17 G2SConfig

Address

Field

Description

0xF_FF10_0000

G2Sconfig

Mode Register of System Interface

20 19

Bit

Reserved

TOut Val

TOut Enable

Write mode

Data rate

Bit

Field

Description

ColdReset

Read/Write

31..20



Reserved

Undefined

Read

19..4

TOut Val

Set Data of Read Time Out Counter

0x0: Generate Read Time Out Error

Other 0x0: Not generate Read Time Out Error

0xFFFF

Read/Write

TOut Enable

Enable bit of Read Time Out Counter

In case of MODE43* = H, Read Time Out Counter

does not work.

We recommend it to write 0 or the value of Read

data.

Read/Write

2..1

Write mode

Processor write protocols set

00: R4000 compatible write

01: Reserved

10: Pipeline write

11: Reissue write

Read/Write

Data rate

At the Block write data rate set

0: AWWWWWWWW

1: AWxxWxxWxxWxx

WxxWxxWxxWxx

Read/Write

Note1: When initialized Single write: ADxx (R4000 compatible)

Block write: ADDDD

Note2: In case of MODE43* = H, Read Time Out Counter does not work.

It can generate Read Time Out Error when wrote in 0x0 at TOut Val. It does not let a value of

TOut Enable affect it. Please write in a value except 0x0 at TOut Val.

Figure 6.2.29 G2Sconfig Register Formats

TMPR4955AF датащи(PDF) 103 Page - Toshiba Semiconductor

TMPR4955AF датащи(HTML) 103 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL