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STM32WB50CG датащи(PDF) 105 Page - STMicroelectronics

номер детали STM32WB50CG
подробное описание детали  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5.2 or 802.15.4 radio solution
PDF  119 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32WB50CG датащи(HTML) 105 Page - STMicroelectronics

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DS13047 Rev 5
105/119
STM32WB50CG STM32WB30CE
Electrical characteristics
110
6.3.24
Communication interfaces characteristics
I2C interface characteristics
The I2C interface meets the timings requirements of the I2C-bus specification and user
manual rev. 03 for:
Standard-mode (Sm): bit rate up to 100 kbit/s
Fast-mode (Fm): bit rate up to 400 kbit/s
Fast-mode Plus (Fm+): bit rate up to 1 Mbit/s.
Table 78. TIMx(1) characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
tres(TIM)
Timer resolution time
-1
-
tTIMxCLK
fTIMxCLK = 64 MHz
15.625
-
ns
fEXT
Timer external clock frequency
on CH1 to CH4
-0
fTIMxCLK/2
MHz
fTIMxCLK = 64 MHz
0
40
ResTIM
Timer resolution
TIM1, TIM16, TIM17
-
16
bit
TIM2
-
32
tCOUNTER
16-bit counter clock period
-
1
65536
tTIMxCLK
fTIMxCLK = 64 MHz
0.015625
1024
µs
tMAX_COUNT
Maximum possible count with
32-bit counter
-
-
65536 × 65536
tTIMxCLK
fTIMxCLK = 64 MHz
-
67.10
s
1. TIMx, is used as a general term where x stands for 1, 2, 16 or 17.
Table 79. IWDG min/max timeout period at 32 kHz (LSI1)(1)
Prescaler divider
PR[2:0] bits
Min timeout RL[11:0] = 0x000
Max timeout RL[11:0] = 0xFFF
Unit
/4
0
0.125
512
ms
/8
1
0.250
1024
/16
2
0.500
2048
/32
3
1.0
4096
/64
4
2.0
8192
/128
5
4.0
16384
/256
6 or 7
8.0
32768
1. The exact timings still depend on the phasing of the APB interface clock vs. the LSI clock, hence there is always a full RC
period of uncertainty.



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