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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32WB50CG датащи(PDF) 103 Page - STMicroelectronics |
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STM32WB50CG датащи(HTML) 103 Page - STMicroelectronics |
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103 / 119 page  DS13047 Rev 5 103/119 STM32WB50CG STM32WB30CE Electrical characteristics 110 Figure 22. ADC accuracy characteristics Figure 23. Typical connection diagram using the ADC 1. Refer to Table 70: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 65: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 3. Refer to Table 65: I/O static characteristics for the values of Ilkg. General PCB design guidelines Power supply decoupling has to be performed as shown in Figure 11: Power supply scheme. The 10 nF capacitor needs to be ceramic (good quality), placed as close as possible to the chip. E T = total unajusted error: maximum deviation between the actual and ideal transfer curves E O = offset error: maximum deviation between the first actual transition and the first ideal one E G = gain error: deviation between the last ideal transition and the last actual one E D = differential linearity error: maximum deviation between actual steps and the ideal one E L = integral linearity error: maximum deviation between any actual transition and the end point correlation line (1) Example of an actual transfer curve (2) Ideal transfer curve (3) End-point correlation line 2n-1 2n-2 2n-3 7 6 5 4 3 2 1 0 23 4 5 6 1 72n-3 2n-2 2n-1 2n V REF+ (or VDDA) Output code E O E T E L E G E D 1 LSB IDEAL (1) (3) (2) MS19880V4 = ADC resolution n MS33900V5 Sample and hold ADC converter 12-bit converter Cparasitic (2) Ilkg (3) VT CADC VDDA RAIN (1) VAIN VT AINx RADC |
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