STM32WB50CG datasheet(35/119 Pages) STMICROELECTRONICS

номер детали	STM32WB50CG

подробное описание детали	Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5.2 or 802.15.4 radio solution

PDF	119 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

Logo

35 / 119 page

DS13047 Rev 5

35/119

STM32WB50CG STM32WB30CE

Functional overview

independent outputs for the highest flexibility can generate independent clocks for the

ADC and the RNG.



Startup clock: after reset, the microcontroller restarts by default with an internal 4 MHz

clock (MSI). The prescaler ratio and clock source can be changed by the application

program as soon as the code execution starts.



Clock security system (CSS): this feature can be enabled by software. If an HSE

clock failure occurs, the master clock is automatically switched to HSI16 and a software

interrupt is generated if enabled. LSE failure can also be detected and an interrupt

generated.



Clock-out capability:

–

MCO: microcontroller clock output: it outputs one of the internal clocks for

external use by the application. Low frequency clocks (LSIx, LSE) are available

down to Stop 1 low power state.

–

LSCO: low speed clock output: it outputs LSI or LSE in all low-power modes

down to Standby.

Several prescalers allow the user to configure the AHB frequencies, the high speed APB

(APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and

the APB domains is 64 MHz.

STM32WB50CG датащи(PDF) 35 Page - STMicroelectronics