IMX6SDLCEC datasheet(167/169 Pages) NXP

167 / 169 page

Revision History

i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018

NXP Semiconductors

167

Rev. 3

02/2014

• Updates throughout for Silicon revision C, including:

- Figure 1 Part number nomenclature diagram

- Table 1 Example Orderable Part Numbers

• Feature descriptions updated for:

- Camera sensors: updated from one to two ports at up to 240 MHz peak.

- Miscellaneous IPs and interfaces; SSI and ESAI.

• Table 2, Modules List, uSDHC 1–4 description change: including SDXC cards up to 2 TB.

• Table 2, Modules List, UART 1–5 description change: programmable baud rate up to 5 MHz.

• Table 3, Special Signal Considerations: XTALOSC_RTC_XTALI/RTC_XTALO: ending paragraph

removed. Was: “In case when high accuracy real time clock are not required system may use internal

low frequency ring oscillator. It is recommended to connect XTALOSC_RTC_XTALI to GND and keep

RTC_XTALO floating.”

• Table 8, Operating Ranges for Run mode LDO bypassed: Added footnote regarding alternate maximum

voltage on VDD_SOC_IN … this maximum can be 1.3V.

• Table 8, Operating Ranges Standby/DSM mode: Added footnote regarding alternate maximum voltage

on VDD_SOC_IN … this maximum can be 1.3V.

• Table 8, Operating Ranges GPIO supply voltages: Corrected supply name to NVCC_NANDF

• Table 8, Operating ranges: updated table footnotes for clarity.

• Removed table “On-Chip LDOs and their On-Chip Loads.”

• Section 4.1.4, External Clock Sources; added Note, “The internal RTC oscillator does not...”.

• Section 4.1.5, Maximum Supply Currents: Reworded second paragraph about the power management

IC to explain that a robust thermal design is required for the increased system power dissipation.

• Table 10, Maximum Supply Currents: NVCC_RGMII Condition value corrected to N=6.

• Table 10, Maximum Supply Currents: Corrected supply name NVCC_NANDF.

• Table 10, Maximum Supply currents: Added row NVCC_LVDS2P5

• Section 4.2.1, Power-Up Sequence: Clarified wording of third bulleted item regarding POR control.

• Section 4.2.1, Power-Up Sequence: Removed Note.

• Section 4.2.1, Power-Up Sequence: Corrected bullet regarding VDD_ARM_CAP / VDD_SOC_CAP

difference from 50 mV to 100 mV.

• Section 4.5.2, OSC32K, second paragraph reworded to describe OSC32K automatic switching.

• Section 4.5.2, OSC32K, added Note following second paragraph to caution use of internal oscillator.

• Table 23, XTALI and RTC_XTALI DC parameters; changed RTC_XTALI Vih minimum value to 0.8.

• Table 23, XTALI and RTC_XTALI DC parameters; changed RTC_XTALI Vih maximum value to 1.1.

• Table 39, Reset Timing Parameters; removed rise/fall time requirement

• Section 4.9.3, External Interface Module; enhanced wording to first paragraph to describe operating

frequency for data transfers, and to explain register settings are valid for entire range of frequencies.

Rev. 3

continued

2/2014

• Table 42, EIM Bus Timing Parameters; reworded footnotes for clarity.

• Table 42, EIM Asynchronous Timing Parameters; removed comment from the Max heading cell.

• Figure 60, Gated Clock Mode Timing Diagram: Corrected HSYNC trace behavior

• Table 66, Video Signal Cross-Reference: Corrected naming of HSYNC and VSYNC

• Section 4.11.22, USB PHY Parameters: Updated Battery Charging Specification bullet

• Table 95, BGA Package Details: Corrected to read “21 x 21, 0.8 mm”.

• Table 96, Supplies Contact Assignments: Corrected supply name NVCC_NANDF

• Table 96, Supplies Contact Assignments: Updated NC rows to show i.MX 6DualLite vs. i.MX 6Solo

• Table 97, Functional Contact Assignments: ALT5 Default function signal names corrected

• Table 97, Functional Contact Assignments: PMIC_ON_REQ Out of Reset value corrected to “Open

Drain with PU (100K) enabled”

• Table 97, Functional Contact Assignments: TEST_MODE row included

• Table 97, Functional Contact Assignments: VDD_ARM_IN and ZQPAD row removed

Table 102. i.MX 6Solo/6DualLite Data Sheet Document Past Revision Histories (continued)

Rev.

Number

Date

Substantive Changes

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