IMX6SDLCEC datasheet(31/169 Pages) NXP

31 / 169 page

Electrical Characteristics

i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018

NXP Semiconductors

STOP_ON

• Arm LDO set to 0.9V

• SoC and PU LDOs set to 1.225 V

• HIGH LDO set to 2.5 V

• PLLs disabled

• DDR is in self refresh.

VDD_ARM_IN (1.4V)

VDD_SOC_IN (1.4V)

VDD_HIGH_IN (3.0V)

8.5

Total

61.9

STOP_OFF

• Arm LDO set to 0.9V

• SoC LDO set to: 1.225 V

• PU LDO is power gated

• HIGH LDO set to 2.5 V

• PLLs disabled

• DDR is in self refresh

VDD_ARM_IN (1.4V)

VDD_SOC_IN (1.4V)

13.5

VDD_HIGH_IN (3.0V)

7.5

Total

STANDBY

• Arm and PU LDOs are power gated

• SoC LDO is in bypass

• HIGH LDO is set to 2.5V

• PLLs are disabled

• Low Voltage

• Well Bias ON

• Crystal oscillator is enabled

VDD_ARM_IN (0.9V)

0.1

VDD_SOC_IN (0.9V)

VDD_HIGH_IN (3.0V)

Total

19.6

Deep Sleep Mode

(DSM)

• Arm and PU LDOs are power gated

• SoC LDO is in bypass

• HIGH LDO is set to 2.5V

• PLLs are disabled

• Low Voltage

• Well Bias ON

• Crystal oscillator and bandgap are disabled

VDD_ARM_IN (0.9V)

0.1

VDD_SOC_IN (0.9V)

VDD_HIGH_IN (3.0V)

0.5

Total

3.4

SNVS only

• VDD_SNVS_IN powered

• All other supplies off

• SRTC running

VDD_SNVS_IN (2.8V)

μA

Total

115

1 The typical values shown here are for information only and are not guaranteed. These values are average values measured

on a typical wafer at 25°C.

Table 11. Stop Mode Current and Power Consumption (continued)

Mode

Test Conditions

Supply

Typical1

Units

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