IMX6SDLCEC datasheet(34/169 Pages) NXP

34 / 169 page

i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018

NXP Semiconductors

Electrical Characteristics

NOTE

Ensure that there is no back voltage (leakage) from any supply on the board

towards the 3.3 V supply (for example, from the external components that

use both the 1.8 V and 3.3 V supplies).

NOTE

USB_OTG_VBUS and USB_H1_VBUS are not part of the power supply

sequence and may be powered at any time.

4.2.2

Power-Down Sequence

No special restrictions for i.MX 6Solo/6DualLite IC.

4.2.3

Power Supplies Usage

All I/O pins should not be externally driven while the I/O power supply for the pin (NVCC_xxx) is OFF.

This can cause internal latch-up and malfunctions due to reverse current flows. For information about I/O

power supply of each pin, see “Power Rail” columns in pin list tables of Section 6, “Package Information

and Contact Assignments.”

NOTE

When the PCIE interface is not used, the PCIE_VP, PCIE_VPH, and

PCIE_VPTX supplies must be powered or grounded. The input and output

supplies for the remaining ports (PCIE_REXT, PCIE_RX_N, PCIE_RX_P,

PCIE_TX_N, and PCIE_TX_P) can remain unconnected. It is

recommended not to turn the PCIE_VPH supply OFF while the PCIE_VP

supply is ON, as it may lead to excessive power consumption. If boundary

scan test is used, PCIE_VP, PCIE_VPH, and PCIE_VPTX must remain

powered.

4.3

Integrated LDO Voltage Regulator Parameters

Various internal supplies can be powered ON from internal LDO voltage regulators. All the supply pins

named *_CAP must be connected to external capacitors. The onboard LDOs are intended for internal use

only and should not be used to power any external circuitry. See the i.MX 6Solo/6DualLite Reference

Manual (IMX6SDLRM) for details on the power tree scheme.

NOTE

The *_CAP signals must not be powered externally. These signals are

intended for internal LDO or LDO bypass operation only.

4.3.1

Digital Regulators (LDO_ARM, LDO_PU, LDO_SOC)

There are three digital LDO regulators (“Digital”, because of the logic loads that they drive, not because

of their construction). The advantages of the regulators are to reduce the input supply variation because of

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