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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP87702 датащи(PDF) 76 Page - Texas Instruments |
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LP87702 датащи(HTML) 76 Page - Texas Instruments |
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76 / 98 page  Table 7-60. FREQ_SEL Register Field Descriptions (continued) Bit Field Type Reset Description 1-0 BUCK_FREQ_SEL R 0h Buck0 and Buck1 switching frequency: 0x0 – 2 MHz 0x1 – 3 MHz 0x2 – 4 MHz 0x3 – 4 MHz (Default from OTP memory) 7.6.1.1.51 BOOST_ILIM_CTRL Register (Offset = 32h) [reset = 0h] BOOST_ILIM_CTRL is shown in Figure 7-69 and described in Table 7-61. Return to Table 7-9. Figure 7-69. BOOST_ILIM_CTRL Register 7 6 5 4 3 2 1 0 RESERVED BOOST_ILIM R/W-0h R/W-0h Table 7-61. BOOST_ILIM_CTRL Register Field Descriptions Bit Field Type Reset Description 7-2 RESERVED R/W 0h 1-0 BOOST_ILIM R/W 0h Sets the current limit of Boost. 00 – 1.0 A 01 – 1.4 A 10 – 1.9 A 11 – 2.8 A (Default from OTP memory) 7.6.1.1.52 ECC_STATUS Register (Offset = 33h) [reset = 0h] ECC_STATUS is shown in Figure 7-70 and described in Table 7-62. Return to Table 7-9. Figure 7-70. ECC_STATUS Register 7 6 5 4 3 2 1 0 RESERVED DED SED R-0h R-0h R-0h Table 7-62. ECC_STATUS Register Field Descriptions Bit Field Type Reset Description 7-2 RESERVED R 0h 1 DED R 0h OTP error correction status: 0 – No dual errors detected 1 – Dual errors detected and not corrected 0 SED R 0h OTP error correction status: 0 – No single errors detected 1 – Single errors detected and corrected 7.6.1.1.53 WD_DIS_CTRL_CODE Register (Offset = 34h) [reset = 0h] WD_DIS_CTRL_CODE is shown in Figure 7-71 and described in Table 7-63. Return to Table 7-9. LP87702 SNVSBU3 – MARCH 2021 www.ti.com 76 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP87702 |
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