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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP87702 датащи(PDF) 72 Page - Texas Instruments |
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LP87702 датащи(HTML) 72 Page - Texas Instruments |
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72 / 98 page  Figure 7-62. BUCK_MASK Register 7 6 5 4 3 2 1 0 BUCK1_PGF_ MASK BUCK1_PGR_ MASK RESERVED BUCK1_ILIM_M ASK BUCK0_PGF_ MASK BUCK0_PGR_ MASK RESERVED BUCK0_ILIM_M ASK R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h Table 7-54. BUCK_MASK Register Field Descriptions Bit Field Type Reset Description 7 BUCK1_PGF_MASK R/W 0h Masking of powergood invalid detection for BUCK1 power good interrupt BUCK1_PG_INT in INT_BUCK register: 0 – Interrupt generated 1 – Interrupt not generated. This bit does not affect BUCK1_PG_STAT status bit in BUCK_STATUS register. (Default from OTP memory) 6 BUCK1_PGR_MASK R/W 0h Masking of powergood valid detection for BUCK1 power good interrupt BUCK1_PG_INT in INT_BUCK register: 0 – Interrupt generated 1 – Interrupt not generated. This bit does not affect BUCK1_PG_STAT status bit in BUCK_STATUS register. (Default from OTP memory) 5 RESERVED R/W 0h 4 BUCK1_ILIM_MASK R/W 0h Masking for BUCK1 current monitoring interrupt BUCK1_ILIM_INT in INT_BUCK register: 0 – Interrupt generated 1 – Interrupt not generated. This bit does not affect BUCK1_ILIM_STAT status bit in BUCK_STATUS register. (Default from OTP memory) 3 BUCK0_PGF_MASK R/W 0h Masking of powergood invalid detection for BUCK0 power good interrupt BUCK0_PG_INT in INT_BUCK register: 0 – Interrupt generated 1 – Interrupt not generated. This bit does not affect BUCK0_PG_STAT status bit in BUCK_STATUS register. (Default from OTP memory) 2 BUCK0_PGR_MASK R/W 0h Masking of powergood valid detection for BUCK0 power good interrupt BUCK0_PG_INT in INT_BUCK register: 0 – Interrupt generated 1 – Interrupt not generated. This bit does not affect BUCK0_PG_STAT status bit in BUCK_STATUS register. (Default from OTP memory) 1 RESERVED R/W 0h 0 BUCK0_ILIM_MASK R/W 0h Masking for BUCK0 current monitoring interrupt BUCK0_ILIM_INT in INT_BUCK register: 0 – Interrupt generated 1 – Interrupt not generated. This bit does not affect BUCK0_ILIM_STAT status bit in BUCK_STATUS register. (Default from OTP memory) 7.6.1.1.45 BOOST_MASK Register (Offset = 2Ch) [reset = 0h] BOOST_MASK is shown in Figure 7-63 and described in Table 7-55. Return to Table 7-9. Figure 7-63. BOOST_MASK Register 7 6 5 4 3 2 1 0 LP87702 SNVSBU3 – MARCH 2021 www.ti.com 72 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP87702 |
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