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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP87702 датащи(PDF) 46 Page - Texas Instruments |
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LP87702 датащи(HTML) 46 Page - Texas Instruments |
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46 / 98 page  Return to Table 7-9. Figure 7-19. DEV_REV Register 7 6 5 4 3 2 1 0 RESERVED DEVICE_ID R-0h R-0h Table 7-11. DEV_REV Register Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R 0h 5-3 DEVICE_ID R 0h Device specific ID code. (Default from OTP memory) 7.6.1.1.2 OTP_CODE Register (Offset = 1h) [reset = 0h] OTP_CODE is shown in Figure 7-20 and described in Table 7-12. Return to Table 7-9. Figure 7-20. OTP_CODE Register 7 6 5 4 3 2 1 0 OTP_ID OTP_REV R-0h R-0h Table 7-12. OTP_CODE Register Field Descriptions Bit Field Type Reset Description 7-2 OTP_ID R 0h Identification Code of the OTP EPROM. (Default from OTP memory) 1-0 OTP_REV R 0h Version number of the OTP ID. (Default from OTP memory) 7.6.1.1.3 BUCK0_CTRL_1 Register (Offset = 2h) [reset = 8h] BUCK0_CTRL_1 is shown in Figure 7-21 and described in Table 7-13. Return to Table 7-9. Figure 7-21. BUCK0_CTRL_1 Register 7 6 5 4 3 2 1 0 RESERVED BUCK0_FPWM BUCK0_RDIS_ EN BUCK0_EN_PIN_CTRL BUCK0_EN R/W-0h R/W-0h R/W-1h R/W-0h R/W-0h Table 7-13. BUCK0_CTRL_1 Register Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R/W 0h 4 BUCK0_FPWM R/W 0h Forces the BUCK0 converter to operate in PWM mode: 0 – Automatic transitions between PFM and PWM modes (AUTO mode). 1 – Forced to PWM operation. (Default from OTP memory) 3 BUCK0_RDIS_EN R/W 1h Enable output discharge resistor when BUCK0 is disabled: 0 – Discharge resistor disabled 1 – Discharge resistor enabled. LP87702 SNVSBU3 – MARCH 2021 www.ti.com 46 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP87702 |
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