LP87702 datasheet(35/98 Pages) TI

35 / 98 page

Table 7-6. PGx Operation

STATUS / USE CASE

CONDITION

PGx SIGNAL(1) (2)

GATED MODE

PGx_MODE = 0

CONTINUOUS MODE

PGx_MODE = 1

Device start-up

Until device state is STANDBY

Low

Converter not selected for PGx

monitoring

EN_PGOOD_x = 0

Converter selected for PGx

monitoring and disabled by host

BUCKx_EN / BOOST_EN = 0 OR

(Pin ctrl AND EN = 0)

Converter start-up delay ongoing

EN = 1

NOK

Converter start-up until valid

output voltage reached

Valid output voltage reached in 800

µs

NOK

Converter start-up until valid

output voltage reached

Valid output voltage not reached at

800 µs

NOK

Output voltage within window

limits after start-up

Must be inside limits longer than

debounce time

Output voltage spikes (over/

undervoltage)

If spikes are outside voltage

monitoring threshold(s) longer than

debounce time

NOK

Voltage setting change, output

voltage ramp

OK (if new voltage reached in 800

µs)

NOK after 800 µs (if new voltage

not reached at 800 µs)

NOK

Output voltage within window

limits after voltage change

Must be inside limits longer than

debounce time

Converter shutdown delay

ongoing

Buck converter disabled by host,

slew-rate controlled ramp down

ongoing

Converter disabled by host,

pulldown resistor active (if

selected)

Converter short-circuit interrupt

pending (converter selected for

PGx monitoring)

Faulty converter disabled by short-

circuit detection

BUCKx_SC_INT / BOOST_SC_INT

= 1

NOK

Thermal shutdown interrupt

pending

Converters disabled by thermal

shutdown detection

TDIE_SD_INT = 1

NOK

Input (VANA) overvoltage

interrupt pending

Converters disabled by overvoltage

detection

OVP_INT = 1

NOK

Supply voltage below VANAUVLO

Low

(1)

NOK (Not OK) means faulty situation. PGx pin is inactive if at least one NOK situation is detected.

(2)

PGx pin is generated from PG_FAULT register bits and INT_TOP_1 register bits TDIE_SD_INT, OVP_INT and

INT_TOP_2(RESET_REG_INT) bit.

7.3.10.4 Warning Interrupts for System Level Diagnostics

7.3.10.4.1 Output Power Limit

The buck converters have programmable output peak current limits. The limits are individually programmed for

both converters with BUCKx_ILIM[2:0] bits. If the load current is increased so that the current limit is triggered,

the converter continues to regulate to the limit current level (current peak regulation). The voltage may decrease

if the load current is higher than limit current. If the current regulation continues for 20 µs, the LP87702 device

sets the BUCKx_ILIM_INT bit and pulls the nINT pin low. The host processor can read the BUCKx_ILIM_STAT

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LP87702

SNVSBU3 – MARCH 2021

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