VT8231 datasheet(113/132 Pages) ETC

113 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-107-

Hardware Monitor I/O Space Registers

7HFKQRORJLHV ,QF

:H &RQQHFW

Offset 47 –Hardware Monitor Fan Configuration.........RW

7-6

Fan 2 RPM Control

00 Divide by 1

01 Divide by 2 ............................................default

10 Divide by 4

11 Divide by 8

5-4

Fan 1 RPM Control

00 Divide by 1

01 Divide by 2 ............................................default

10 Divide by 4

11 Divide by 8

3-0

Reserved

........................................ always reads 0

Offset 49 –Hardware Monitor Temp Low Order Value RW

7-6

TSENS3 Value Low-Order Bits

Upper 8 bits are stored in offset 1Fh

5-4

TSENS2 Value Low-Order Bits

Upper 8 bits are stored in offset 21h

Over Temperature Active Low for PMU to

Control Stop Clock

Disable ...................................................default

1Enable

Chassis Active Low Output 20 msec

Disable ...................................................default

1Enable

Interrupt Active High Output

Disable ...................................................default

1Enable

Reserved

........................................ always reads 0

Offset 4B –Temperature Interrupt Configuration ........ RW

7-6

TSENS1 Value Low-Order Bits ..................def = 00

Upper 8 bits are stored in offset 20h

5-4

TSENS3 Hot Temp Interrupt Mode ...........def = 01

3-2

TSENS2 Hot Temp Interrupt Mode ...........def = 01

1-0

TSENS1 Hot Temp Interrupt Mode ...........def = 01

The following applies to each of the above 3 fields

00 Default Interrupt Mode. An interrupt occurs if

the temperature goes above the hot limit. The

interrupt will be cleared once the status register

is read, but will be generated again when the

next conversion is completed. Interrupts will

continue to be generated until the temperature

goes below the hysteresis limit.

01 One-Time Interrupt Mode.

An interrupt is

generated if the temperrature goes above the

hot limit. The interrupt will be cleared when

the status register is read. Another interrupt

will not be generated until the temperature first

drops below the hysteresis limit............. default

10 Comparator mode. An interrupt occurs if the

temperature goes above the hot limit.

This

interrupt remains active until the temperature

goes below the hot limit (i.e., no hysteresis).

11 Default Interrupt Mode (same as 00)

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