VT8231 datasheet(74/132 Pages) ETC

74 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-68-

Function 0 Registers - PCI to ISA Bridge

7HFKQRORJLHV ,QF

:H &RQQHFW

Offset 88 – PLL Test .........................................................RW

PCS0# Access Status

RTC Rx32 / Rx7F Write Protect

Disable ...................................................default

1Enable

MC IRQ Test (Do Not Program)

Disable ...................................................default

1Enable

PLL PU (Do Not Program)

Disable ...................................................default

1Enable

PLL Test Mode (Do Not Program)

Disable ...................................................default

1Enable

2-0

PLL Test Mode Select

Offset 89 – PLL Control ...................................................RW

7-4

Reserved

........................................ always reads 0

3-2

PLL PCLK Input Delay Select

1-0

PLL CLK66 Feedback Delay Select

Offset 8A – PCS2/3 I/O Port Address Mask................... RW

7-4

PCS3# I/O Port Address Mask 3-0

3-0

PCS2# I/O Port Address Mask 3-0

Offset 8B – PCS Control .................................................. RW

PCS3# For Internal I/O