VT8231 datasheet(28/132 Pages) ETC

28 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-22-

Pinouts

7HFKQRORJLHV ,QF

:H &RQQHFW

Internal Keyboard Controller

Signal Name

Pin #

I/O

Signal Description

MSCK / IRQ1

IO / I

MultiFunction Pin (Internal mouse controller enabled by Rx5A[1])

Rx5A[1]=1 Mouse Clock. From internal mouse controller.

Rx5A[1]=0 Interrupt Request 1. Interrupt 1 (external KBC).

MSDT / IRQ12

IO / I

MultiFunction Pin (Internal mouse controller enabled by Rx5A[1])

Rx5A[1]=1 Mouse Data. From internal mouse controller.

Rx5A[1]=0 Interrupt Request 12. Interrupt 12 (ext PS2 mouse ctlr).

KBCK / A20GATE

IO / I

MultiFunction Pin (Internal keyboard controller enabled by Rx5A[0])

Rx5A[0]=1 Keyboard Clock. From internal keyboard controller

Rx5A[0]=0 Gate A20. Input from external keyboard controller.

KBDT / KBRC

IO / I

MultiFunction Pin (Internal keyboard controller enabled by Rx5A[0])

Rx5A[0]=1 Keyboard Data. From internal keyboard controller.

Rx5A[0]=0 Keyboard Reset. From external keyboard controller (KBC)

for CPURST# generation

KBCS# / ROMCS# / strap

O / O / I

Keyboard Chip Select (Rx5A[0]=0). To external keyboard controller chip.

Chip Selects

Signal Name

Pin #

I/O

Signal Description

ROMCS# / KBCS# / strap

O / O / I

ROM Chip Select (Rx5A[0]=1). Chip Select to the BIOS ROM.

MCCS# / GPO17 / strap

O / IO

Microcontroller Chip Select (Rx76[3] = 1, Rx76[4] = 0, Rx77[0] = 1).

Asserted during read or write accesses to I/O ports 62h or 66h.

PCS0# / GPO16 / strap

O / IO / IO

Programmable Chip Select 0. (Rx76[1] = 1 and Rx8B[0] = 1). Asserted

during I/O cycles to programmable read or write ISA I/O port ranges. See

also Rx59[3] and Rx77[2].

PCS1# / ACSDIN2 / GPIO19

O / I / IO

Programmable Chip Select 1.

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