VT8231 datasheet(33/132 Pages) ETC

33 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-27-

Pinouts

7HFKQRORJLHV ,QF

:H &RQQHFW

Resets, Clocks, and Clock Control

Signal Name

Pin #

I/O

Signal Description

PWRGD

Power Good. Connected to the PWRGOOD signal on the Power Supply.

PWRBTN#

Power Button. Used by the Power Management subsystem to monitor an

external system on/off button or switch.

The VT8231 performs a 200us

debounce of this input if Function 4 Rx40[5] is set to 1. (3.3V only)

SLPBTN# /

FAN2 /

GPIO18

I / I

/ IO

Sleep Button.

Used by the power management subsystem to monitor an

external system sleep button or switch (Function 4 Rx40[6] = 1). Connect to

VCC if not used.

PCIRST#

PCI Reset. Active low reset signal for the PCI bus. The VT8231 will assert

this pin during power-up or from the control register.

RTCX1

RTC Crystal Input: 32.768 KHz crystal or oscillator input. This input is

used for the internal RTC and for power-well power management logic.

RTCX2

RTC Crystal Output: 32.768 KHz crystal output

OSC

T12

Oscillator. 14.31818 MHz clock signal used by the internal Timer.

SLOWCLK /

GPO0

Slow Clock. Frequency selectable if PMU function 4 Rx54[1-0] is nonzero

(set to 01, 10, or 11).

CPUSTP# /

GPO5

O /

CPU Clock Stop (Rx75[4] = 0).

Signals the system clock generator to

disable the CPU clock outputs. Not connected if not used. See also PMU I/O

Rx2C[3].

PCISTP# /

GPO6

O /

PCI Clock Stop (Rx75[5] = 0). Signals the system clock generator to disable

the PCI clock outputs. Not connected if not used.

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