VT8231 datasheet(85/132 Pages) ETC

85 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-79-

Function 2 Registers - USB Controller Ports 0-1

7HFKQRORJLHV ,QF

:H &RQQHFW

Offset 42 - FIFO Control ..................................................RW

7-4

Reserved

........................................ always reads 0

3-2

Reserved (Do Not Program).................... default = 0

1-0

Release Continuous REQ After “N” PCICLKs

00 Do Not Release ........................................... def

01 N = 32 PCICLKs

10 N = 64 PCICLKs

11 N = 96 PCICLKs

Offset 60 - Serial Bus Release Number.............................RO

7-0

Release Number.............................. always reads 10h

Offset 83-80 – PM Capability............................................RO

31-0 PM Capability .................... always reads 00020001h

Offset 84 – PM Capability Status ....................................RW

7-0

PM Capability Status........................... default = 00h

Supports 00h (Off) and 11h (On) only

Offset C1-C0 - Legacy Support.........................................RO

15-0 UHCI v1.1 Compliant ................ always reads 2000h

USB I/O Registers

These registers are compliant with the UHCI v1.1 standard.

Refer to the UHCI v1.1 specification for further details.

I/O Offset 1-0 - USB Command

I/O Offset 3-2 - USB Status

I/O Offset 5-4 - USB Interrupt Enable

I/O Offset 7-6 - Frame Number

I/O Offset B-8 - Frame List Base Address

I/O Offset 0C - Start Of Frame Modify

I/O Offset 11-10 - Port 0 Status / Control

I/O Offset 13-12 - Port 1 Status / Control

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