VT8231 datasheet(59/132 Pages) ETC

59 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-53-

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Serial Port 2 Registers

These registers are located at I/O ports which are offsets from

“COM2Base” (index C8h of the Super-I/O configuration

registers). COM2Base is typically set to allow these ports to

be accessed at the standard serial port 2 address range of 2F8-

2FFh.

Port COM1Base+0 – Transmit / Receive Buffer ............RW

7-0

Serial Data

Port COM1Base+1 – Interrupt Enable ...........................RW

7-4

Undefined

..........................................always read 0

Interrupt on Hnadshake Input State Change

Intr on Parity, Overrun, Framing Error or Break

Interrupt on Transmit Buffer Empty

Interrupt on Receive Data Ready

Port COM1Base+2 – Interrupt Status .............................RO

7-3

Undefined

..........................................always read 0

2-1

Interrupt ID (0=highest priority)

00 Priority 3 (Handshake Input Changed State)

01 Priority 2 (Transmit Buffer Empty)

10 Priority 1 (Data Received)

11 Priority 0 (Serialization Error or Break)

Interrupt Pending

No Interrupt Pending

Port COM1Base+2 – FIFO Control ............................... WO

Port COM1Base+3 – UART Control...............................RW

Divisor Latch Access

Select transmit / receive registers

Select divisor latch

Break

Break condition off

Break condition on

5-3

Parity

000 None

001 Odd

011 Even

101 Mark

111 Space

Stop Bits

1-0

Data Bits

00 5

01 6

10 7

11 8

Port COM1Base+4 – Handshake Control ...................... RW

7-5

Undefined

......................................... always read 0

Loopback Check

Normal operation

Loopback enabled

General Purpose Output 2 (unused in VT8231)

General Purpose Output 1 (unused in VT8231)

Request To Send

Disabled

1Enabled

Data Terminal Ready

Disabled

1Enabled

Port COM1Base+5 – UART Status................................. RW

Undefined

......................................... always read 0

Transmitter Empty

1 byte in transmit hold or transmit shift register

0 bytes transmit hold and transmit shift regs

Transmit Buffer Empty

1 byte in transmit hold register

Transmit hold register empty

Break Detected

No break detected

Break detected

Framing Error Detected

No error

Error

Parity Error Detected

No error

Error

Overrun Error Detected

No error

Error

Received Data Ready

No received data available

Received data in receiver buffer register

Port COM1Base+6 – Handshake Status......................... RW

DCD Status (1=Active, 0=Inactive)

RI Status (1=Active, 0=Inactive)

DSR Status (1=Active, 0=Inactive)

CTS Status (1=Active, 0=Inactive)

DCD Changed (1=Changed Since Last Read)

RI Changed (1=Changed Since Last Read)

DSR Changed (1=Changed Since Last Read)

CTS Changed (1=Changed Since Last Read)

Port COM1Base+7 – Scratchpad .................................... RW

Scratchpad Data

Port COM1Base+9-8 – Baud Rate Generator Divisor .. RW

15-0 Divisor Value for Basud Rate Generator

Baud Rate = 115,200 / Divisor

(e.g., setting this register to 1 selects 115.2 Kbaud)

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