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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PC87413 датащи(PDF) 115 Page - National Semiconductor (TI) |
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PC87413 датащи(HTML) 115 Page - National Semiconductor (TI) |
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115 / 257 page  5.0 X-Bus Extension (Continued) Revision 1.2 115 www.national.com 5.5 USAGE HINTS 1. Bear in mind the following system design hints for asynchronous X-Bus use: — The chip-select signal must be used as a qualifier with the address when partial address decoding is in use for mul- tiple device access control. — In read cycles, the system may drive the data until the read signal XRD_XEN is de-asserted to guarantee the proper PC8741x sampling. — In write cycles, use either the falling or rising edge of the write control signal (XWR_XRW) to latch the data in the device. 2. Address multiplexing on XD7-0 and strobe signals XSTB2-0 are designed for glueless interface with off-chip latch com- ponents (see the example in Figure 29). Figure 29. Latched Mode X-Bus Transaction External Logic (74HC373*) D7-0 A27-20 A19-12 A3-0 PC8741x XA3-0 XD7-0 A11-4 Latch (74HC373*) Latch (74HC373*) Latch XSTB0 XSTB1 XSTB2 * - For mode 0, mode 0 fast, and mode 1, use 74HC373 - For mode 0 turbo, use 74VHC373 - For 5V-powered X-Bus devices, use 74HCT/VHCT373, which is also powered by the 5V supply. |
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