PC87413 datasheet(106/257 Pages) NSC

106 / 257 page

5.0 X-Bus Extension (Continued)

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Revision1.2

Table 31. Protected Block Size

A read/write transaction to/from a protected block is not allowed to take place if, for the respective block number, the

HWRP/HRDP bit is set in the HAP0 or HAP1 register (see Section 5.4.11 on page 114). This includes both memory and I/O

transactions.

To prevent bypassing the protection by selecting additional non-BIOS zones to XCS0 or XCS1, the upper lines of the

address are not used for block selection. This results in the aliasing of a protected block in each area of X-Bus memory space

that has the same size as the BIOS Zone (see Figure 27).

The SMI interrupt generated on access to XCS0 and XCS1 may be used to allow flash updates under System Management

protection.

BIOS Zone Size

BIOSIZE2-BIOSIZE0

Protected Block Size

Address Lines Used for

Block Selection1,2

1. Selects the block according to the HAPINDX3-HAPINDX0 setting in the HAP0-HAP1 registers.

2. All the other address lines are ignored.

256 Kbyte

000

16 Kbyte

XA17-XA14

512 Kbyte

001

32 Kbyte

XA18-XA15

1 Mbyte

010

64 Kbyte

XA19-XA16

2 Mbyte

011

128 Kbyte

XA20-XA17

4 Mbyte

100

256 Kbyte

XA21-XA18

8 Mbyte

101

512 Kbyte

XA22-XA19

16 Mbyte

110

1 Mbyte

XA23-XA20

Figure 27. Protected Block Aliasing

X-Bus Memory Space

000 0000h

FFF FFFFh

BIOS Zone Size

Protected Block n

BIOS Zone Size

Protected Block n

BIOS Zone Size

Protected Block n

BIOS Zone Size

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