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FXOS8700CQ датащи(PDF) 74 Page - Freescale Semiconductor, Inc

номер детали FXOS8700CQ
подробное описание детали  6-Axis Xtrinsic Sensor with Integrated
PDF  86 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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FXOS8700CQ датащи(HTML) 74 Page - Freescale Semiconductor, Inc

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Freescale Semiconductor, Inc.
The m_os[2:0] OSR setting along with the system ODR value set in CTRL_REG1 sets the magnetic output data update rate.
When m_hms[1:0] = 2'b11, magnetic output data is available in registers M_OUT_X_MSB (0x33), M_OUT_X_LSB (0x34),
M_OUT_Y_MSB (0x35), M_OUT_Y_LSB (0x36), M_OUT_Z_MSB (0x37), and M_OUT_Z_LSB (0x38) along with the time
synchronized accelerometer data in CMP_X_MSB (0x39), CMP_X_LSB (0x3A), CMP_Y_MSB (0x3B), CMP_Y_LSB (0x3C),
CMP_Z_MSB (0x3D), and CMP_Z_LSB (0x3E).
9.17.2
M_CTRL_REG2 (0x5C) register
m_ost
One-shot magnetic measurement mode:
0: No action taken, or one-shot measurement complete.
1: If device is in Active mode no action is taken. If device is in Standby mode, take one set of magnetic
measurements, clear this bit, and return to Standby mode.
m_os[2:0]
Oversample ratio (OSR) for magnetometer data (see Table 95).
m_hms[1:0]
00 = Only accelerometer sensor is active
01 = Only magnetometer sensor is active
11 = Hybrid mode, both accelerometer and magnetometer sensors are active(1)
1. When operating in hybrid mode, the effective ODR for each sensor is half of the frequency selected in the CTRL_REG1[dr] and
CTRL_REG1[aslp_rate] bit fields.
hyb_autoinc_mode
m_maxmin_dis m_maxmin_dis_ths
m_maxmin_rst
m_rst_cnt[1:0]
0
0
0
0
0
0
0b00
Figure 124. M_CTRL_REG2 register
Table 94. M_CTRL_REG2 bit descriptions
Field
Description
hyb_autoinc_mode
With hyb_autoinc_mode = 1 and fast-read mode is disabled (CTRL_REG1 [f_read] = 0), the register address will
automatically advance to register x33 (M_OUT_X_MSB) after reading register x06 (OUT_Z_LSB) in burst-read
mode. For hyb_autoinc_mode = 1 and fast read mode enabled (CTRL_REG1[f_read = 1) the register address will
automatically advance to register x33 (M_OUT_X_MSB) after reading register x05 (OUT_Z_MSB) during a burst-
read mode. Please refer to the register map auto-increment address column for further information.
m_maxmin_dis
Magnetic measurement max/min detection function disable:
0: Magnetic min/max detection function is enabled (default).
1: Magnetic min/max detection function is disabled.
When enabled, the magnetic min/max detection function will update the MAX_X/Y/Z and MIN_X/Y/Z
registers at the end of each ODR cycle with the maximum and minimum magnetic measurements from each axis.
This is used along with the auto-cal feature (M_CTRL_REG1[m_acal] = 1) as a hardware based hard-iron offset
compensation function.
m_maxmin_dis_ths
Magnetic measurement min/max detection function disable via magnetic threshold event trigger:
0: No impact to magnetic min/max detection function on a magnetic threshold event
1: Magnetic min/max detection function is disabled when magnetic threshold event is triggered
m_maxmin_rst
Magnetic measurement min/max detection function reset:
0: No reset sequence is active
1: Setting this bit resets the MIN_X/Y/Z and MAX_X/Y/Z registers to 0x7FFF and 0x8000, respectively (positive and
negative full-scale values).This bit is automatically cleared after the reset is completed.
m_rst_cnt[1:0]
Magnetic auto-reset de-gauss frequency:
00: Automatic magnetic reset at the beginning of each ODR cycle (default).
01: Automatic magnetic reset every 16 ODR cycles.
10: Automatic magnetic reset every 512 ODR cycles.
11: Automatic magnetic reset is disabled. Magnetic reset only occurs automatically on a transition from Standby to
Active mode, or can be triggered manually by setting M_CTRL_REG1 [m_rst] = 1
Table 93. M_CTRL_REG1 bit descriptions



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