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PIC18F23K22-E/ML датащи(PDF) 199 Page - Microchip Technology |
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PIC18F23K22-E/ML датащи(HTML) 199 Page - Microchip Technology |
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199 / 496 page ![]() 2010 Microchip Technology Inc. Preliminary DS41412C-page 199 PIC18(L)F2X/4XK22 14.4.7 START-UP CONSIDERATIONS When any PWM mode is used, the application hardware must use the proper external pull-up and/or pull-down resistors on the PWM output pins. The CCPxM<1:0> bits of the CCPxCON register allow the user to choose whether the PWM output signals are active-high or active-low for each pair of PWM output pins (PxA/PxC and PxB/PxD). The PWM output polarities must be selected before the PWM pin output drivers are enabled. Changing the polarity configuration while the PWM pin output drivers are enable is not recommended since it may result in damage to the application circuits. The PxA, PxB, PxC and PxD output latches may not be in the proper states when the PWM module is initialized. Enabling the PWM pin output drivers at the same time as the Enhanced PWM modes may cause damage to the application circuit. The Enhanced PWM modes must be enabled in the proper Output mode and complete a full PWM cycle before enabling the PWM pin output drivers. The completion of a full PWM cycle is indicated by the TMRxIF bit of the PIR1, PIR2 or PIR5 register being set as the second PWM period begins. FIGURE 14-19: EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRxSYNC = 0) FIGURE 14-20: EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION (STRxSYNC = 1) Note: When the microcontroller is released from Reset, all of the I/O pins are in the high-impedance state. The external cir- cuits must keep the power switch devices in the Off state until the microcontroller drives the I/O pins with the proper signal levels or activates the PWM output(s). PWM P1n = PWM STRx P1<D:A> PORT Data PWM Period PORT Data PWM PORT Data P1n = PWM STRx P1<D:A> PORT Data |
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