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ATtiny43U датащи(PDF) 128 Page - ATMEL Corporation

номер детали ATtiny43U
подробное описание детали  8-bit Microcontroller with 4K Bytes In-System Programmable Flash and Boost Converter
PDF  182 Pages
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производитель  ATMEL [ATMEL Corporation]
домашняя страница  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATtiny43U датащи(HTML) 128 Page - ATMEL Corporation

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8048B–AVR–03/09
ATtiny43U
• Bit 4 – ADIF: ADC Interrupt Flag
This bit is set when an ADC conversion completes and the data registers are updated. The ADC
Conversion Complete Interrupt is executed if the ADIE bit and the I-bit in SREG are set. ADIF is
cleared by hardware when executing the corresponding interrupt handling vector. Alternatively,
ADIF is cleared by writing a logical one to the flag. Beware that if doing a Read-Modify-Write on
ADCSRA, a pending interrupt can be disabled. This also applies if the SBI instruction is used.
• Bit 3 – ADIE: ADC Interrupt Enable
When this bit is written to one and the I-bit in SREG is set, the ADC Conversion Complete Inter-
rupt is activated.
• Bits 2:0 – ADPS2:0: ADC Prescaler Select Bits
These bits determine the division factor between the system clock frequency and the input clock
to the ADC.
16.13.3
ADCL and ADCH – ADC Data Register
16.13.3.1
ADLAR = 0
16.13.3.2
ADLAR = 1
Table 16-5.
ADC Prescaler Selections
ADPS2
ADPS1
ADPS0
Division Factor
000
2
001
2
010
4
011
8
100
16
101
32
110
64
111
128
Bit
151413121110
9
8
0x05 (0x25)
–
–
–
–
–
–
ADC9
ADC8
ADCH
0x04 (0x24)
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
ADCL
765
43
21
0
Read/Write
RR
RR
RR
R
R
RR
RR
RR
R
R
Initial Value
0
0
0
0
0
0
0
0
000
00
00
0
Bit
151413121110
9
8
0x05 (0x25)
ADC9
ADC8
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADCH
0x04 (0x24)
ADC1
ADC0
–
–
–
–
–
–
ADCL
765
43
21
0
Read/Write
RR
RR
RR
R
R
RR
RR
RR
R
R
Initial Value
0
0
0
0
0
0
0
0
000
00
00
0



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