ATtiny43U datasheet(92/182 Pages) ATMEL

92 / 182 page

8048B–AVR–03/09

ATtiny43U

Table 12-6 on page 92 shows the COMnB[1:0] bit functionality when the WGMn[2:0] bits are set

to fast PWM mode.

Note:

1. A special case occurs when OCRnB equals TOP and COMnB1 is set. In this case, the Com-

pare Match is ignored, but the set or clear is done at TOP. See “Fast PWM Mode” on page 85

for more details.

Table 12-7 shows the COMnB[1:0] bit functionality when the WGMn2:0 bits are set to phase cor-

rect PWM mode.

Note:

1. A special case occurs when OCRnB equals TOP and COMnB1 is set. In this case, the Com-

pare Match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on

page 87 for more details.

• Bits 3, 2 – Res: Reserved Bits

These bits are reserved and will always read zero.

• Bits 1:0 – WGMn[1:0]: Waveform Generation Mode

Combined with the WGMn2 bit found in the TCCRnB Register, these bits control the counting

sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-

form generation to be used, see Table 12-8 on page 93. Modes of operation supported by the

Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode,

and two types of Pulse Width Modulation (PWM) modes (see “Modes of Operation” on page 84).

Table 12-6.

Compare Output Mode, Fast PWM Mode(1)

COMnB1

COMnB0

Description

Normal port operation, OCnB disconnected.

Reserved

Clear OCnB on Compare Match, set OC0B at TOP

Set OCnB on Compare Match, clear OC0B at TOP

Table 12-7.

Compare Output Mode, Phase Correct PWM Mode(1)

COMnB1

COMnB0

Description

Normal port operation, OCnB disconnected.

Reserved

Clear OCnB on Compare Match when up-counting. Set OCnB on

Compare Match when down-counting.

Set OCnB on Compare Match when up-counting. Clear OCnB on

Compare Match when down-counting.

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