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IMX35 датащи(PDF) 105 Page - Freescale Semiconductor, Inc |
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IMX35 датащи(HTML) 105 Page - Freescale Semiconductor, Inc |
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105 / 148 page ![]() i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6 Freescale Semiconductor 105 4.9.17.5 UDMA-In Timing Figure 80 shows timing when the UDMA-in transfer starts, Figure 81 shows timing when the UDMA-in host terminates transfer, Figure 82 shows timing when the UDMA-in device terminates transfer, and Table 68 lists the timing parameters for the UDMA-in burst. Figure 80. UDMA-In Transfer Starts Timing Diagram Figure 81. UDMA-In Host Terminates Transfer Timing Diagram tn, tj tkjn tn = tj = tkjn = (max.(time_k,. time_jn) × T – (tskew1 + tskew2 + tskew6) time_jn —ton toff ton = time_on × T – tskew1 toff = time_off × T – tskew1 — Table 67. MDMA Read and Write Timing Parameters (continued) ATA Parameter Parameter from Figure 78, Figure 79 Value Controlling Variable |
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