IMX35 datasheet(2/148 Pages) FREESCALE

2 / 148 page

i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6

Freescale Semiconductor

The i.MX35 supports connections to various types of external memories, such as SDRAM, mobile DDR,

and DDR2, SLC and MCL NAND Flash, NOR Flash and SRAM. The devices can be connected to a

variety of external devices such as USB 2.0 OTG, ATA, MMC/SDIO, and Compact Flash.

1.1

Features

It provides low-power solutions for applications demanding high-performance multimedia and graphics.

The i.MX35 is based on the ARM1136 platform, which has the following features:

•

ARM1136JF-S processor, version r1p3

•

16-Kbyte L1 instruction cache

•

16-Kbyte L1 data cache

•

128-Kbyte L2 cache, version r0p4

•

128 Kbytes of internal SRAM

•

Vector floating point unit (VFP11)

To boost multimedia performance, the following hardware accelerators are integrated:

•

Image processing unit (IPU)

•

OpenVG 1.1 graphics processing unit (GPU)

The MCIMX35 provides the following interfaces to external devices (some of these interfaces are muxed

and not available simultaneously):

•

2 controller area network (CAN) interfaces

•

2 SDIO/MMC interfaces, 1 SDIO/CE-ATA interface

•

32-bit mobile DDR, DDR2 (4-bank architecture), and SDRAM (up to 133 MHz)

•

2 configurable serial peripheral interfaces (CSPI) (up to 52 Mbps each)

•

Enhanced serial audio interface (ESAI)

•

2 synchronous serial interfaces (SSI)

•

Ethernet MAC 10/100 Mbps

•

1 USB 2.0 host with ULPI interface or internal full-speed PHY. Up to 480 Mbps if external HS

PHY is used.

•

1 USB 2.0 OTG (up to 480 Mbps) controller with internal high-speed OTG PHY

•

Flash controller—MLC/SLC NAND and NOR

•

GPIO with interrupt capabilities

•3 I2C modules (up to 400 Kbytes each)

•JTAG

•

Key pin port

•

Asynchronous sample rate converter (ASRC)

•1-Wire

•

Parallel camera sensor (4/8/10/16-bit data port for video color models: YCC, YUV, 30 Mpixels/s)

•

Parallel display (primary up to 24-bit, 1024 x 1024)

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