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M16C/1N датащи(PDF) 193 Page - Renesas Technology Corp |
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M16C/1N датащи(HTML) 193 Page - Renesas Technology Corp |
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193 / 238 page ![]() Rev.1.00 Oct 20, 2004 page 181 of 222 M16C/1N Group 19. Flash Memory Version REJ09B0007-0100Z Flash memory control register 0 Symbol Address After reset FMR0 01B716 XX0000012 b7 b6 b5 b4 b3 b2 b1 b0 FMR00 Bit symbol Bit name RW 0 : Busy (being written or erased) 1 : Ready CPU rewrite mode select bit (Note 1) 0 : Disables CPU rewrite mode 1 : Enables CPU rewrite mode FMR01 Block 0, 1 rewrite-enable bit (Note 2) 0 : Disables rewriting 1 : Enables rewriting Flash memory stop bit (Note 3, 4) FMR02 FMSTP 0 0 RY/BY status flag Reserved bit Set to "0" 0 : Terminated normally 1 : Terminated in error Program status flag (Note 5) FMR06 0 : Terminated normally 1 : Terminated in error Erase status flag (Note 5) FMR07 Function RW RW RW RW RO RO 0 : Boot ROM area is accessed 1 : User ROM area is accessed User ROM area select bit (Effective in only boot mode) (Note 3) FMR05 RW RO (b4) 0 : Enables flash memory operation 1 : Stops flash memory operation (placed in low power mode, flash memory initialized) Note 1: When setting this bit to "1", write a "0" and then a "1" in to it in succession. Make sure no interrupts will occur before completion of these two write operations. In EW0 mode, write this bit by a program placed to an area other than internal flash memory. Set this bit to "0" after placing in read array mode. Note 2: When setting this bit to "1", write a "0" and then a "1" in to it in succession while the FMR01 bit is "1". Make sure no interrupts will occur before completion of these two write operations. Note 3: Write this bit by a program placed to an area other than internal flash memory. Note 4: This bit is valid when the FMR01 bit is "1" (CPU rewrite mode). When the FMR01 bit is "0", although the FMSTP bit can be set to "1" by writing "1" in a program, the flash memory is not initialized. Note 5: This bit is cleared to "0" by executing the clear status command. Figure 19.4 FMR0 Register (11) FMR 41bit In EW0 mode, when setting the FMR41 bit to "1" by software during auto erasing, the microcomputer shifts to the erasure-suspend mode. In EW1 mode, when occurring the enabled interrupt request, the FMR 41bit changes to "1" (Suspend- request) automatically and the microcomputer shifts to the erasure-suspend mode. Setting the FMR41 bit to "0" (Erase restart), auto erasing is resumed. (12) FMR46bit The FMR46 bit is "0" during auto erasing and is "1" during the erasure-suspend mode. The internal flash memory is banned to access while the FMR41 bit is "0". |
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