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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS41 датащи(PDF) 148 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 148 Page - Toshiba Semiconductor |
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148 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-146 7 6 5 4 3 2 1 0 T45CR ← 0 X X X − − − 0 Disable double buffer of TREG4. TRUN ← − X − 0 − − − − Stop timer 4. TREG4 ← * * * * * * * * Set the duty. (16 bits) * * * * * * * * TREG5 ← * * * * * * * * Set the cycle. (16 bits) * * * * * * * * T45CR ← 0 X X X − − − 1 Enable double buffer of TREG4. (Change the duty and cycle at the interrupt INTTR5.) T4FFCR ← 1 1 0 0 1 1 0 0 Set the mode to invert TFF4 at the match with TREG4 or TREG5, and also set TFF4 to “0”. T4MOD ← 0 0 1 0 0 1 * * Select the internal clock for the input, and disable the capture function. P8CR ← − − − − − 1 − − P8FC ← X − X X − 1X X Assign P82 as TO4. TRUN ← 1 X − 1 −− − − Start timer 4. X: Don’t care, −: No change Figure 3.9.12 Programmable Pulse Generation (PPG) Output Waveforms When the double buffer of TREG4 is enabled in this mode, the value of register buffer 4 will be shifted into TREG4 on finding a match with TREG5. This feature makes the handling of low duty waves easy. Figure 3.9.13 Operation of Register Buffer (** = 01, 10, 11) Match with TREG4 (Interrupt INTTR4) Match with TREG5 (Interrupt INTTR5) TO4 pin Match with TREG4 Match with TREG5 TREG4 (Value to be compared) Register buffer Up counter = Q1 Up counter = Q2 Q1 Q2 Q2 Q3 Shift into TREG5 Write into TREG4 |
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