TMP93CS41 datasheet(147/248 Pages) TOSHIBA

147 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-145

(1) 16-bit timer mode

Generating interrupts at fixed intervals:

In this example, the interval time is set in the timer register TREG5 to generate the

interrupt INTTR5.

TRUN

← − X − 0 − − − −

Stop timer 4.

INTET54

← 1 1 0 0 1 0 0 0

Enable INTTR5 and set interrupt level 4. Disable INTTR4.

T4FFCR

← 1 1 0 0 0 0 1 1

Disable trigger.

T4MOD

← 0 0 1 0 0 1 * *

Select internal clock for input and

disable the capture function.

TREG5

← *

Set the interval time (16 bits).

TRUN

← 1 X − 1 −− −−

Start timer 4.

X: Don’t care,

−: No change

(2) 16-bit event counter mode

In 16-bit timer mode as described in (1) above, the timer can be used as an event counter

by selecting the external clock (TI4 pin input) as the input clock. To read the value of the

counter, first perform “software capture” once and read the captured value.

The counter counts at the rising edge of the TI4 pin input.

The TI4 pin can also be used as P80 or INT4.

TRUN

← − X − 0 − − − −

Stop timer 4.

P8CR

← − − − − − − − 0

Set P80 to input mode.

INTET54

← 1 1 0 0 1 0 0 0

Enable INTTR5 and sets interrupt level 4, while disables

INTTR4.

T4FFCR

← 1 1 0 0 0 0 1 1

Disable trigger.

T4MOD

← 0 0 1 0 0 1 0 0

Select TI4 as the input clock.

TREG5

← *

Set the number of counts (16 bits).

TRUN

← 1 X − 1 − − − −

Start timer 4.

Note: When using this set up as an event counter, set the prescaler in RUN mode.

(3) 16-bit programmable pulse generation (PPG) output mode

The PPG mode is obtained by inversion of the timer flip-flop TFF4 that is enabled by the

match of the up counter UC4 with either of the timer registers TREG4 or TREG5. TFF4 is

also output to TO4 (which can be alternatively used as P82). In this mode, the following

conditions must be satisfied:

(Set value of TREG4) < (Set value of TREG5)

(**

= 01, 10, 11)

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