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TMP93CS41 датащи(PDF) 152 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 152 Page - Toshiba Semiconductor |
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152 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-150 Figure 3.9.16 One-shot Pulse Output (without delay) 2. Frequency measurement The frequency of the external clock can be measured in this mode. The clock signal is input through the TI4 pin, and its frequency is measured by the 8-bit timers (Timer 0 and timer 1) and the 16-bit timer/event counter (Timer 4). The TI4 pin input should be selected for the clock input of timer 4. The value of the up counter is loaded into the capture register CAP1 at the rising edge of the timer flip-flop TFF1 of the 8-bit timers (Timer 0 and timer 1). Similarly, the up counter value is loaded into CAP2 at the falling edge of the TFF1 flip-flop. The frequency is calculated by the difference between the values loaded in CAP1 and CAP2, at the moment when an interrupt (INTT0 or INTT1) is generated by either 8-bit timer. Figure 3.9.17 Frequency Measurement For example, if the value for the level “1” width of TFF1 of the 8-bit timer is set to 0.5 s and the difference between CAP1 and CAP2 is 100, the frequency will be 100 ÷ 0.5 s = 200 Hz. Count clock (Internal clock) c TI4 pin input (External trigger pulse) Match with TREG5 Timer output pin TO4 Enable inversion caused by loading of the up counter value into CAP1. Disable inversion caused by loading of the up counter value into CAP2. INT4 occurrence. Load the up counter value into capture register 1 (CAP1). Load the up counter value into capture register 2 (CAP2). Enable inversion Pulse width (p) INTTR5 occurrence c + p C1 TFF1 C1 Loading UC4 into CAP1 Loading UC4 into CAP2 Count clock (Internal clock) INTT0/INTT1 C2 C2 C2 C1 |
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