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ADC3683 датащи(PDF) 56 Page - Texas Instruments

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номер детали ADC3683
подробное описание детали  ADC3683-SP Space Grade 18-Bit 1 to 65MSPS, Low Noise, Ultra-low Power Dual Channel ADC
PDF  70 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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ADC3683 датащи(HTML) 56 Page - Texas Instruments

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Figure 9-7. Register 0x11
7
6
5
4
3
2
1
0
0
0
0
0
0
DLL PDN
0
AZ EN
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Table 9-8. Register 0x11 Field Descriptions
Bit
Field
Type
Reset
Description
7-3
0
R/W
0
Must write 0
2
DLL PDN
R/W
0
This register applies ONLY to the ADC3683-SP. It powers down
the internal DLL, which is used to adjust the sampling time. This
register must only be enabled when operating at sampling rates
below 40 MSPS. When DLL PDN bit is enabled, the sampling
time is directly dependent on sampling clock duty cycle (with a
50/50 duty the sampling time is TS/2).
0: Sampling time is TS/ 4
1: Sampling time is TS/2 (only for sampling rates below 40
MSPS).
1
0
R/W
0
Must write 0
0
AZ EN
R/W
0/1
This bit enables the internal auto-zero circuitry. It is disabled by
default for the ADC3683-SP.
0: Auto-zero disabled
1: Auto-zero enabled
Figure 9-8. Register 0x13
7
6
5
4
3
2
1
0
0
0
0
0
0
0
E-FUSE LD
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Table 9-9. Register 0x13 Field Descriptions
Bit
Field
Type
Reset
Description
7-1
0
R/W
0
Must write 0
0
E-FUSE LD
R/W
0
This register bit loads the internal bit mapping for different
interfaces. After setting the interface in register 0x07, this E-
FUSE LD bit needs to be set to 1 and reset to 0 for loading to go
into effect. Register 0x07 along with the E-Fuse Load (0x12, D0)
needs to be loaded first in the programming sequence since the
E-Fuse load resets the SPI writes.
0: E-FUSE LOAD set
1: E-FUSE LOAD reset
ADC3683-SP
SBASAB5 – MARCH 2024
www.ti.com
56
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Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: ADC3683-SP



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