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ADC3683 датащи(PDF) 25 Page - Texas Instruments

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номер детали ADC3683
подробное описание детали  ADC3683-SP Space Grade 18-Bit 1 to 65MSPS, Low Noise, Ultra-low Power Dual Channel ADC
PDF  70 Pages
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7.3.4.2 Digital Filter Operation
The complex decimation operation is illustrated with an example in Figure 7-19. First, the input signal (and
the negative image) are frequency shifted by the NCO frequency as shown on the left side of the image.
Next, a digital filter is applied (centered around 0 Hz) and the output data rate is decimated by 8 complex,
In this example, the output data rate FS,OUT = FS/8 with a Nyquist zone of FS/16. During the complex mixing,
the spectrum (signal and noise) is split into real and complex parts, so the amplitude is reduced by 6dB. To
compensate this loss, there is a 6dB digital gain option in the decimation filter block that can be enabled via SPI
write.
FS/2
-FS/2
Shifted Input
Signal (Alias)
Shifted Input Signal
Negative Image
Decimation
by 8
0
FS/2
-FS/2
Input Signal
(Alias)
Input Signal
Negative Image
FNCO
0
NCO Tuning Range
-FIN + FNCO
FIN + FNCO
FS/16
-FS/16
Figure 7-19. Complex decimation illustration
The real decimation operation is shown in Figure 7-20. There is no frequency shift happening, and only the real
portion of the complex digital filter is exercised. The output data rate is decimated . A decimation of 8 results in
an output data rate FS,OUT = FS/8 with a Nyquist zone of FS/16.
During the real mixing, the spectrum (signal and noise) amplitude is reduced by 3dB. To compensate this loss,
there is a 3dB digital gain option in the decimation filter block that can be enabled via SPI write.
FS/2
FS/4
FS/8
FS/16
FS/32
Decimation by 2
Decimation by 4
Decimation by 8
Decimation by
16
Decimation by
32
FS/64
Input Signal
Figure 7-20. Real decimation illustration
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ADC3683-SP
SBASAB5 – MARCH 2024
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