CS47L35 datasheet(143/300 Pages) CIRRUS

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DS1085F3

143

CS47L35

4.11 Output Signal Path

4.11.6 Output Signal Path AEC Loop-Back

The CS47L35 incorporates two loop-back signal paths, which are ideally suited as a reference for AEC processing. Any

two of the output signal paths may be selected as the AEC loop-back sources.

When configured with suitable DSP firmware, the CS47L35 can provide an integrated AEC capability. The AEC loop-back

feature also enables convenient hook-up to an external device for implementing the required signal-processing algorithms.

The AEC loop-back source is connected after the respective digital volume controls, as shown in Fig. 4-49. The AEC

loop-back signals can be selected as input to any of the digital mixers within the CS47L35 digital core. The sample rate

for the AEC loop-back paths is configured using OUT_RATE—see Table 4-21.

The AEC loop-back function is enabled using the AECn_LOOPBACK_ENA bits (where n identifies the applicable path,

AEC1 or AEC2). The source signals for the Transmit Path AEC function are selected using the AECn_LOOPBACK_SRC

bits.

The CS47L35 performs automatic checks to confirm that the SYSCLK frequency is high enough to support the AEC

loop-back function. If the frequency is too low, an attempt to enable this function fails. Note that active signal paths are not

affected under such circumstances.

The AECn_ENA_STS bits indicate the status of the AEC loop-back functions. If an underclocked error condition occurs,

these bits indicate whether the AEC loop-back function has been enabled.

Table 4-69. Output Signal Path Noise-Gate Control

Bit

Label

Default

Description

R1043 (0x0413)

Noise_Gate_Select_1L

11:0 OUT1L_NGATE_

SRC[11:0]

0x001 Output Signal Path Noise-Gate Source. Enables one of more signal paths as

inputs to the respective noise gate. If more than one signal path is enabled as

an input, the noise gate is only activated (i.e., muted) when all of the respective

signal thresholds are satisfied.

Each bit is coded as 0 = Disabled, 1 = Enabled

R1047 (0x0417)

Noise_Gate_Select_1R

11:0 OUT1R_NGATE_

SRC[11:0]

0x002

R1067 (0x042B)

Noise_Gate_Select_4L

11:0 OUT4L_NGATE_

SRC[11:0]

0x040 [11] = Reserved

[10] = Reserved

[9] = OUT5R

[8] = OUT5L

[7] = Reserved

[6] = OUT4L

[5] = Reserved

[4] = Reserved

[3] = Reserved

[2] = Reserved

[1] = OUT1R

[0] = OUT1L

R1075 (0x0433)

Noise_Gate_Select_5L

11:0 OUT5L_NGATE_

SRC[11:0]

0x100

R1079 (0x0437)

Noise_Gate_Select_5R

11:0 OUT5R_NGATE_

SRC[11:0]

0x200

R1112 (0x0458)

Noise_Gate_Control

5:4 NGATE_

HOLD[1:0]

Output Signal Path Noise-Gate Hold Time (delay before noise gate is activated)

00 = 30 ms

01 = 120 ms

10 = 250 ms

11 = 500 ms

3:1 NGATE_THR[2:0]

000

Output Signal Path Noise-Gate Threshold

000 = –78 dB

001 = –84 dB

010 = –90 dB

011 = –96 dB

100 = –102 dB

101 = –108 dB

110 = –114 dB

111 = –120 dB

NGATE_ENA

Output Signal Path Noise-Gate Enable

0 = Disabled

1 = Enabled

Table 4-70. Output Signal Path AEC Loop-Back Control

Bit

Label

Default

Description

R1104 (0x0450)

DAC_AEC_

Control_1

5:2

AEC1_LOOPBACK_

SRC[3:0]

0000

Input source for Tx AEC1 function

0000 = OUT1L

0001 = OUT1R

0110 = OUT4L

1000 = OUT5L

1001 = OUT5R

All other codes are reserved

AEC1_ENA_STS

Transmit (Tx) Path AEC1 Control Status

0 = Disabled

1 = Enabled

AEC1_LOOPBACK_

ENA

Transmit (Tx) Path AEC1 Control

0 = Disabled

1 = Enabled

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