CS47L35 datasheet(146/300 Pages) CIRRUS

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DS1085F3

CS47L35

4.11 Output Signal Path

Figure 4-52. Speaker Output Current Monitoring Connections (Speaker Protection)

Please contact your Cirrus Logic representative for further information on the Speaker Protection software.

4.11.9 Speaker Outputs (Digital PDM)

The CS47L35 supports a two-channel pulse-density modulation (PDM) digital speaker interface; the PDM outputs are

associated with the OUT5L and OUT5R output signal paths.

The external connections associated with the PDM outputs are implemented on multi-function GPIO pins, which must be

configured for the respective PDM functions when required. The PDM output connections are pin-specific alternative

functions available on specific GPIO pins. See Section 4.14 to configure the GPIO pins for the PDM output.

The PDM digital speaker interface is a stereo interface; the OUT5L and OUT5R output signal paths are interleaved on the

SPKDAT output, and clocked using SPKCLK.

Note that the PDM interface supports two different operating modes; these are selected using SPK1_FMT. See Table 3-15

for detailed timing information in both modes.

• If SPK1_FMT = 0 (Mode A), the Left PDM channel is valid at the rising edge of SPKCLK; the Right PDM channel is

valid at the falling edge of SPKCLK.

• If SPK1_FMT = 1 (Mode B), the Left PDM channel is valid during the low phase of SPKCLK; the Right PDM channel

is valid during the high phase of SPKCLK.

The PDM interface timing is shown in Fig. 4-53.

Figure 4-53. Digital Speaker (PDM) Interface Timing

Clocking for the PDM interface is derived from SYSCLK. Note that SYSCLK_ENA must also be set. See Section 4.16 for

further details of the system clocks and control registers.

SPKOUTP

SPKOUTN

IN2RP

IN2RN

SPKGNDP

SPKGNDN

0.1



(1%, 100ppm/°C)

CS47L35

SPKCLK output (Mode A)

SPKDAT output

(left & right channels interleaved)

Left channel output

Right channel output

SPKCLK output (Mode B)

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