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CS43131 датащи(PDF) 16 Page - Cirrus Logic |
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CS43131 датащи(HTML) 16 Page - Cirrus Logic |
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16 / 156 page ![]() 16 DS1155F1 CS43131 3 Characteristics and Specifications HPOUTx; RL = 32 CL = 200 pF OUT_FS = 01 Volume = 0 dB, unless otherwise specified Dynamic range (defined in Table 3-1) 24-bit, 32-bit, DSD 16-bit A-weighted Unweighted A-weighted Unweighted 119 116 91 88 125 122 97 94 — — — — dB dB dB dB THD+N (defined in Table 3-1) 24-bit, 32-bit 16-bit DSD 0 dB –20 dB –60 dB 0 dB –20 dB –60 dB 0 dB –20 dB –60 dB — — — — — — — — — –110 –92 –62 –94 –74 –34 –106 –92 –62 –104 — –56 –88 — –28 –96 — –56 dB dB dB dB dB dB dB dB dB Idle channel noise (A-weighted) (defined in Table 3-1) 24-bit, 32-bit, DSD — 0.55 — µV Full-scale output voltage 2.68 2.81 2.96 Vpp Output power — 30.8 — mW Interchannel isolation 6(defined in Table 3-1) 217 Hz 1 kHz 20 kHz — — — 110 105 90 — — — dB dB dB HPOUTx; RL = 16 CL = 200 pF OUT_FS = 00 Volume = 0 dB, unless otherwise specified Dynamic range (defined in Table 3-1) 24-bit, 32-bit 16-bit A-weighted Unweighted A-weighted Unweighted 113 110 89 86 119 116 95 92 — — — — dB dB dB dB THD+N (defined in Table 3-1) 24-bit, 32-bit 16-bit DSD 0 dB –20 dB –60 dB 0 dB –20 dB –60 dB 0 dB –20 dB –60 dB — — — — — — — — — –100 –86 –56 –94 –74 –34 –100 –86 –56 –94 — –50 –88 — –28 –94 — –50 dB dB dB dB dB dB dB dB dB Idle channel noise (A-weighted) (defined in Table 3-1) 24-bit, 32-bit, DSD — 0.55 — µV Full-scale output voltage 1.34 1.41 1.48 Vpp Output power — 15.6 — mW Interchannel isolation 6 (defined in Table 3-1) 217 Hz 1 kHz 20 kHz — — — 105 100 85 — — — dB dB dB Other characteristics for HPOUTx Interchannel gain mismatch (defined in Table 3-1)— ±0.1 — dB Interchannel phase mismatch (defined in Table 3-1)— — ±0.01 ° Output offset voltage: Mute (defined in Table 3-1) — ±50 ±100 µV Gain drift (defined in Table 3-1)— ±100 — ppm/°C Load resistance (RL)16 — — Load capacitance (CL)— — 1 nF Turn-on time (defined in Table 3-1)— — 12 ms Audio latency after RESET released 7 —— 22 ms Click/pop during PDN_HP enable or disable A-weighted — ±50 ±100 µV Table 3-5. Analog Output Characteristics (HV_EN = 0) 1 (Cont.) Test conditions (unless otherwise specified): Fig. 2-1 shows CS43131 connections; input test signal is a 32-bit, full-scale 997-Hz sine wave (unless specified otherwise); GNDA = GNDCP = GNDD = 0 V; voltages are with respect to ground; HV_EN = 0; ASP_M/Sb = 1; typical, min/max performance data taken with VA = VCP = 1.8 V; VL = VD = 1.8 V; VP = 3.6 V; TA = +25°C; measurement bandwidth is 20 Hz–20 kHz; ASP_SPRATE = 0001 (LRCK = 44.1-kHz mode); PDN_XTAL = 0, MCLK_INT = 1, and MCLK_SRC_SEL = 00 (crystal frequency fXTAL = 22.5792 MHz); Volume = 0 dB; when testing in DSD processor mode, DSD_ZERODB = 1 ; when testing noise related specifications (dynamic range, THD+N, idle channel noise), no external impedance on HPREFx. PCM and DSD Processor Mode Parameter 2,3,4 Minimum Typical Maximum Units |
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