CS43131 datasheet(86/156 Pages) CIRRUS

86 / 156 page

DS1155F1

CS43131

5.13 Example Sequences

22 Configure DSD Interface

DSD Interface Configuration. 0x70003

0x00

Reserved

DSD_M/SB

DSD_PM_EN

DSD_PM_SEL

0000 0

DSD is clock slave

Function is disabled

23 Configure DSD path Signal

Control 2

DSD Processor Path Signal Control 2.

0x70004

0x13

Reserved

DSD_PRC_SRC

DSD_EN

Reserved

DSD_SPEED

STA_DSD_DET

INV_DSD_DET

Set source of DSD processor to DSDIF

Enable DSD playback

Set DSD clock speed to 64•FS

Static DSD detection enabled

Invalid DSD detection enabled

24 Configure DSD path Signal

Control 3.

Enable mono mode:

a. Select Channel A/B

(DSD_SWAP_CHAN)

b. Copy Channel A to B

(DSD_COPY_CHAN)

c. Invert Channel B

(DSD_INV_B)

DSD Processor Path Signal Control 3.

0x70006

0xC5/0xC7 for Left/Right channel

DSD_ZERODB

DSD_HPF_EN

Reserved

SIGCTL_DSDEQPCM

DSD_INV_A

DSD_INV_B

DSD_SWAP_CHAN

DSD_COPY_CHAN

0/1

The SACD 0–dB reference level (50%modulation index)

matches PCM 0-dB full scale.

Enable HPF in DSD processor

Function is disabled

Function is enabled

Function is enabled/disabled

Function is enabled

25 Configure HP

26 Configure Class H Amplifier

Class H Control. 0xB0000

0x1E

Reserved

ADPT_PWR

HV_EN

EXT_VCPFILT

000

111

Output signal determines voltage level

High Voltage Mode Enabled

Using Internal VCPFILT source.

27 Set HP output to full scale

HP Output Control 1. 0x80000

0x30

HP_CLAMPA

HP_CLAMPB

OUT_FS

HP_IN_EN

HP_IN_LP

Reserved

+1dB_EN

Set headphone output to Full Scale (1.732 V rms)

28 Configure Headphone Detect

HP Detect. 0xD0000

0x04

HPDETECT_CTRL

HPDETECT_INV

HPDETECT_RISE_DBC_TIME

HPDETECT_FALL_DBC_TIME

Reserved

HP detect disabled

HP detect input is not inverted

Tip Sense rising debounce time set to 0 ms

Tip sense falling debounce time set to 500 ms

29 Headphone Detect

HP Detect. 0xD0000

0xC4

HPDETECT_CTRL

HPDETECT_INV

HPDETECT_RISE_DBC_TIME

HPDETECT_FALL_DBC_TIME

Reserved

HP detect enabled

HP detect input is not inverted

Tip sense rising debounce time set to 0 ms

Tip sense falling debounce time set to 500 ms

30 Enable Interrupts

31 Read Interrupt Status 1 register (0xF0000) and Interrupt Status 5 register (0xF0004) to clear sticky bits

32 Enable Headphone Detect

Interrupts

Interrupt Mask 1. 0xF0010

0x81

DAC_OVFL_INT_MASK

HPDETECT_PLUG_INT_MASK

HPDETECT_UNPLUG_INT_MASK

XTAL_READY_INT_MASK

XTAL_ERROR_INT_MASK

PLL_READY_INT_MASK

PLL_ERROR_INT_MASK

PDN_DONE_INT_MASK

Unmask HPDETECT_PLUG interrupt and

HPDETECT_UNPLUG interrupt

33 Enable DSD Interrupts

Interrupt Mask 5. 0xF0014

0x03

DSD_STUCK_INT_MASK

DSD_INVAL_A_INT_MASK

DSD_INVAL_B_INT_MASK

DSD_SILENCE_A_INT_MASK

DSD_SILENCE_B_INT_MASK

DSD_RATE_ERROR_INT_MASK

DOP_MRK_DET_INT_MASK

DOP_ON_INT_MASK

Enable DSD_STUCK interrupt

Enable DSD_INVAL_A interrupt

Enable DSD_INVAL_B interrupt

Enable DSD_SILENCE_A interrupt

Enable DSD_SILENCE_B interrupt

Enable DSD_RATE_ERROR interrupt

Disable DOP_MRK_DET interrupt

Disable DOP_ON interrupt

34 Wait for interrupt. Check if PLL_READY_INT = 1 in Interrupt Status 1 register(0xF0000)

Example 5-11. Startup to DSD Playback in Mono Mode (Cont.)

STEP

TASK

VALUE

DESCRIPTION

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