CS43131 datasheet(55/156 Pages) CIRRUS

55 / 156 page

DS1155F1

CS43131

4.10 DSD Interface

Each sample is 24 bits, as shown in Fig. 4-28, where the 8 most significant bits are used for the DSD marker and alternate

with each sample between 0x05/0xFA. Each channel within a sample contains the same marker. The remaining 16 lower

bits are then used for the DSD data, with the first or oldest bit in Slot t0.

Figure 4-28. DoP Data Sample and Stereo Stream Example

Each PCM frame is assigned to a specific channel (left or right), and when used for DSD streaming, each PCM frame

contains only DSD data corresponding to its assigned channel. The CS43131 unpacks the received DoP data and reforms

it into a DSD stream to feed the internal DSD data paths.

It includes the following features:

• 24 bits per PCM data sample

•I2S format is supported

• DoP data is unpacketed internally for DSD playback

• Clock Master and Slave Mode

• Up to 128•Fs DSD stream

— Accepts a 64•Fs DSD stream with LRCK@176.4 kHz

— Accepts a 128•Fs DSD stream with LRCK@352.8 kHz

To enable DoP interface on the ASP to take in DSD source:

1. Configure the ASP per clocking/format required by DoP content.

2. Configure DSD_SPEED per DoP content.

3. Set DSD_PRC_SRC =

10 and DSD_EN = 1.

4.10 DSD Interface

The DSD interface is enabled or disabled by PDN_DSDIF bit. When cleared, the DSD data interface is enabled. When

using this interface, the DSD interface clock can be mastered by the CS43131 (DSD_M/SB=1). If set to Master Mode,

DSDCLK toggles if both PDN_DSDIF and XSP_3ST bits are cleared, and DSD_EN is set.

If the DSD interface clock is slaved (DSD_M/SB=0), when MCLK_INT is set as 22.5792 MHz, DSDCLK is required to be

synchronous to MCLK_INT. The DSDCLK can be derived by either:

• Exporting 1/2, 1/4, or 1/8 the frequency of the CS43131 crystal to CLKOUT, or

• Sourcing MCLK_INT and DSDCLK from the same external clock source

DSD Marker (8 MSB)

dm7 dm6 dm5 dm4 dm3 dm2 dm1 dm0 t0

t10

t11

t12

t13

t14

t15

16 DSD Audio bits for one channel (oldest bit = t0)

24-Bit PCM Frame

MSB

LSB

0x05

0xFA

LRCK (I2S)

SDATA

(DoP)

0x05

Data Stream Example of Stereo DoP

DoP Data Sample

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