XRT7250 datasheet(132/463 Pages) EXAR

132 / 463 page

áç

DS3/E3 FRAMER IC

XRT7250

REV. 1.1.1

113

checks for signal transitions at the TxInClk and RxLi-

neClk input pins. If a Loss of Clock Signal event oc-

cur such that no transitions are occurring on these

pins, then the LOC circuitry will automatically assert

the RDY_DTCK signal in order to complete (or termi-

nate) the current Read or Write cycle with the Framer

Microprocessor Interface section.

The user may enable or disable this LOC Protection

feature by writing to Bit 7 (LOC Enable) within the

Framer I/O Register, as depicted below.

Writing a "1" to this bit-field enables this LOC Protec-

tion feature. Writing a "0" to this bit-field disables this

feature.

NOTE: The Ring Oscillator can be a source of noise, within

the Framer chip. Hence, there may be situations where the

user will wish to disable the LOC Protection feature.

2.5

USING THE PMON HOLDING REGISTER

The Microprocessor Interface section consists of an

8-bit bi-directional data bus. As a consequence, the

local µP will be able to read from and write to the

Framer on-chip registers, 8 bit per (read or write) cy-

cle. Since most of the Framer on-chip registers con-

tain 8-bits, communicating with the local µP, over an

8-bit data bus, is not much of an inconvenience.

However, all of the PMON registers, within the Framer

IC, contain 16 bits. Consequently, any reads of the

PMON registers, will require two read cycles.

The XRT7250 Framer IC includes a feature that will

make reading a PMON register a slightly less compli-

cated task. The Framer chip address space contains

a register known as the PMON Holding register,

which is located at 0x6C. Whenever the local µP

reads in an 8-bit value of a given PMON registers

(e.g., either the upper-byte or the lower byte value of

the PMON register), the other 8-bit value of that

PMON register will automatically be accessible by

reading the PMON Holding register.

Hence, anytime the local µP is trying to read in the

contents of a PMON register, the first read access

must be made directly to one of the 8-bit values of the

PMON registers (e.g., for example: the PMON LCV

Event Count Register - MSB, Address = 0x50). How-

ever, the second read can always be made to a con-

stant location in system memory, the PMON Holding

2.6

THE INTERRUPT STRUCTURE WITHIN THE FRAMER

MICROPROCESSOR INTERFACE SECTION

The XRT7250 Framer device is equipped with a so-

phisticated Interrupt Servicing Structure. This Inter-

rupt Structure includes an Interrupt Request output,

INT, numerous Interrupt Enable Registers and numer-

ous Interrupt Status Registers. The Interrupt Servic-

ing Structure, within the Framer contains two levels of

hierarchy. The top level is at the functional block level

(e.g., the Receive Section, the Transmit Section, etc.).

The lower hierarchical level is at the individual inter-

rupt or source level. Each hierarchical level consists

of a complete set of Interrupt Status Registers/bits

and Interrupt Enable Registers/bits, as will be dis-

cussed below.

Both of the functional sections, within the Framer, are

capable of generating Interrupt Requests to the local

µP/µC. The Framer device Interrupt Structure has

been carefully designed to allow the user to quickly

determine the exact source of the interrupt (with mini-

mal latency) which will aid the local µP/µC in deter-

mining which interrupt service routine to call up in or-

der to respond to or eliminate the condition(s) caus-

ing the interrupt.

Table 5 lists all of the possible conditions that can

generate interrupts, with each functional section of

the Framer IC.

ADDRESS = 0X01, FRAMER I/O CONTROL REGISTER

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

LOC Enable

Test PMON

Interrupt

Enable

Reset

AMI/B3ZS*

Unipolar/

Bipolar*

TxLine

Clk Inv

RxLine

Clk Inv

Reframe

R/W

0100

000

XRT7250 датащи(PDF) 132 Page - Exar Corporation

XRT7250 датащи(HTML) 132 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL