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XRT7250 датащи(PDF) 22 Page - Exar Corporation |
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XRT7250 датащи(HTML) 22 Page - Exar Corporation |
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22 / 463 page ![]() áç áç áç áç DS3/E3 FRAMER IC XRT7250 REV. 1.1.1 3 PIN DESCRIPTIONS PIN DESCRIPTION PIN #NAME TYPE DESCRIPTION 1 NC Not Bonded Out 2 NC Not Bonded Out 3 VDD **** Power Supply Pin 4 NC Not Bonded Out 5 GND **** Ground Pin 6 Rdy_Dtck O READY or DTACK This active-low output pin will function as the READY output, when the micro- processor interface is running in the "Intel" Mode; and will function as the DTACK output, when the microprocessor interface is running in the "Motorola" Mode. "Intel" Mode - READY Output When the Framer negates this output pin (e.g., toggles it "low"), it indicates (to the µP) that the current READ or WRITE cycle is to be extended until this sig- nal is asserted (e.g., toggled "high"). "Motorola" Mode - DTACK (Data Transfer Acknowledge) Output The Framer device will assert this pin in order to inform the local microproces- sor that the present READ or WRITE cycle is nearly complete. If the Framer device requires that the current READ or WRITE cycle be extended, then the Framer will delay its assertion of this signal. The 68000 family of µPs requires this signal from its peripheral devices, in order to quickly and properly complete a READ or WRITE cycle. 7 WR_RW I Write Data Strobe (Intel Mode) If the microprocessor interface is operating in the Intel Mode, then this active- low input pin functions as the WR (Write Strobe) input signal from the µP. Once this active-low signal is asserted, then the Framer will latch the contents of the µP Data Bus, into the addressed register (or RAM location) within the Framer IC. In the Intel Mode, data gets latched on the rising edge of WR R/W Input Pin (Motorola Mode) When the Microprocessor Interface Section is operating in the Motorola Mode, then this pin is functionally equivalent to the R/W pin. In the Motorola Mode, a READ operation occurs if this pin is at a logic "1". Similarly, a WRITE operation occurs if this pin is at a logic "0". 8 CS I Chip Select Input This active-low input signal selects the Microprocessor Interface Section of the Framer device and enables READ/WRITE operations between the Local Microprocessor and the Framer on-chip registers and RAM locations. 9 ALE_AS I Address Latch Enable/Address Strobe This input is used to latch the address (present at the Microprocessor Interface Address Bus, A[8:0]) into the Framer Microprocessor Interface circuitry and to indicate the start of a READ/WRITE cycle. This input is active-high in the Intel Mode (MOTO = "low") and active-low in the Motorola Mode (MOTO = "high"). |
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