XRT7250 datasheet(9/463 Pages) EXAR

9 / 463 page

XRT7250

DS3/E3 FRAMER IC

áç

REV. 1.1.1

VII

RXE3 INTERRUPT ENABLE REGISTER - 1 (ADDRESS = 0X12) ........................................................ 327

RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) ........................................................ 327

RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ........................................................ 328

RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ........................................................ 328

RXE3 CONFIGURATION & STATUS REGISTER - 2 (ADDRESS = 0X11) ........................................... 328

RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ........................................................ 329

RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ........................................................ 329

RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ........................................................ 330

RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ........................................................ 330

RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ..................................................................... 330

RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ..................................................................... 331

6.0 E3/ITU-T G.832 OPERATION OF THE XRT7250 .......................................................................... 332

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 332

6.1 DESCRIPTION OF THE E3, ITU-T G.832 FRAMES AND ASSOCIATED OVERHEAD BYTES .................... 332

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 333

THE MAINTENANCE AND ADAPTATION (MA) BYTE FORMAT ......................................................... 334

6.2 THE TRANSMIT SECTION OF THE XRT7250 (E3 MODE OPERATION) ................................................ 335

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 341

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 343

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 345

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 347

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 350

FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) .......................................................... 352

TRANSMIT E3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) .......................................... 367

TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30) ................................................................... 368

TXE3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) ........................................................ 368

TRANSMIT E3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) .......................................... 368

TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) .......................................... 369

TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) .......................................... 370

BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04) .......................................................... 373

TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30) ................................................................... 375

I/O CONTROL REGISTER (ADDRESS = 0X01) .................................................................................... 379

I/O CONTROL REGISTER (ADDRESS = 0X01) .................................................................................... 381

II/O CONTROL REGISTER (ADDRESS = 0X01) ................................................................................... 381

BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04) .......................................................... 383

TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) .......................................... 383

TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) .......................................... 384

6.3 THE RECEIVE SECTION OF THE XRT7250 (E3 MODE OPERATION) .................................................. 384

II/O CONTROL REGISTER (ADDRESS = 0X01) ................................................................................... 386

II/O CONTROL REGISTER (ADDRESS = 0X01) ................................................................................... 389

RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) ........................................................ 394

RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) ............................................. 394

RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) ........................................................ 395

RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) ............................................. 395

PMON FRAMING BIT/BYTE ERROR COUNT REGISTER - MSB (ADDRESS = 0X52) ....................... 396

PMON FRAMING BIT/BYTE ERROR COUNT REGISTER - LSB (ADDRESS = 0X53) ........................ 396

RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) ............................................. 396

RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) ............................................. 397

RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) ........................................................ 397

RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) ............................................. 398

RXE3 INTERRUPT STATUS REGISTER - 1 (ADDRESS = 0X14) ........................................................ 398

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