XRT7250 datasheet(35/463 Pages) EXAR

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XRT7250

DS3/E3 FRAMER IC

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REV. 1.1.1

RxFrame

Receive Boundary of DS3 or E3 Frame Output Indicator:

The exact functionality of this output pin depends upon whether the XRT7250

Framer IC is operating in the “Serial” or “Nibble-Parallel” Mode.

Serial Mode Operation

The Receive Section of the XRT7250 will pulse this output pin “high” (for one

bit-period) when the “Receive Payload Data Output Interface” block is driving

the very first bit of a given DS3 or E3 frame, onto the “RxSer” output pin.

Nibble-Parallel Operation

The Receive Section of the XRT7250 will pulse this output pin “high” (for one

nibble-period), when the “Receive Payload Data Output Interface” block is driv-

ing the very first nibble of a given DS3 or E3 frame, onto the “RxNib[3:0] output

pins.

VDD

****

Power Supply Pin

RxOutClk

Receive Out Clock - Transmit Terminal Interface Clock for Loop-

Timing.

This clock signal functions as the "Terminal Interface" clock source, if the

XRT7250 Framer IC is operating in the "loop-timing" mode.

In this mode, the Transmitting Terminal Equipment is expected to input data to

the Framer IC, via the “TxSer” input pin, upon the rising edge of this clock sig-

nal. The XRT7250 will use the rising edge of this clock signal to sample the

data at the TxSer input.

This clock signal is a buffered version of the RxLineClk signal.

RxRED

Receiver Red Alarm Indicator - Receive Framer:

The Framer asserts this output pin to denote that one of the following events

has been detected by the Receive Framer:

LOS - Loss of Signal Condition

OOF - Out of Frame Condition

AIS - Alarm Indication Signal Detection

RxOOF

Receiver "Out of Frame" Indicator:

The Receive Section of the XRT7250 Framer IC will assert this output signal

whenever it has declared an "Out of Frame" (OOF) condition with the incoming

DS3 or E3 frames. This signal is negated when the framer correctly locates the

framing alignment bits or bytes and correctly aligns itself with the incoming

DS3 or E3 frames.

RxLOS

Receive Section - Loss of Signal Output Indicator:

This pin is asserted when the Receive Section encounters a string of 180 con-

secutive 0's (for DS3 operation) or 32 consecutive 0's (for E3 operation) via the

RxPOS and RxNEG pins.

This pin will be negated once the Receive Section has detected at least 60

pulses within 180 bit-periods (for DS3 operation); or the Receive Section has

detected a string of 32 consecutive bits, that does not contain a string of 4 con-

secutive "0s" (for E3 operation).

RxOHClk

Receive Overhead Output Clock Signal

The XRT7250 will output the Overhead bits (within the incoming DS3 or E3

frames), via the "RxOH" output pin, upon the falling edge of this clock signal.

As a consequence, the "user's data link equipment" should use the rising edge

of this clock signal to sample the data on both the "RxOH" and "RxOHFrame"

output pins.

NOTE: This clock signal is always active.

PIN DESCRIPTION

PIN #NAME

TYPE

DESCRIPTION

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