LTC6952 datasheet(8/80 Pages) AD

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LTC6952

6952f

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Preliminary Technical Data

Advance Product Information Subject to Change

Rev PrA

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating

junction temperature range, otherwise specifications are at TA = 25°C. VREF+ = VD+ = VVCO+ = VOUT+ = 3.3V, VCP+ = 5V unless otherwise

specified (Note 2). All voltages are with respect to GND.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Additive Phase Noise, Jitter and Spurious (Note 8)

Output Noise/Jitter: Distribution Section Only

(fVCO = 4.5GHz, fOUTx = 4.5GHz, Mx = 1)

Phase Noise Floor

RMS Jitter, 12kHz to 20MHz Integration BW

RMS Jitter, ADC SNR Method (Note 15)

–154.3

dBc/Hz

fsRMS

Output Noise/Jitter: Distribution Section Only

(fVCO = 4.5GHz, fOUTx = 2.25GHz, Mx = 2)

Phase Noise Floor

RMS Jitter, 12kHz to 20MHz Integration BW

RMS Jitter, ADC SNR Method (Note 15)

–157.1

dBc/Hz

fsRMS

Output Noise/Jitter: Distribution Section Only

(fVCO = 4.5GHz, fOUTx = 1.125GHz, Mx = 4)

Phase Noise Floor

RMS Jitter, 12kHz to 20MHz Integration BW

RMS Jitter, ADC SNR Method (Note 15)

–160.2

dBc/Hz

fsRMS

Output Noise/Jitter: Distribution Section Only

(fVCO = 3.2GHz, fOUTx = 200MHz, Mx = 16)

Phase Noise Floor

RMS Jitter, 12kHz to 20MHz Integration BW

RMS Jitter, ADC SNR Method (Note 15)

–167.8

dBc/Hz

fsRMS

Output Noise/Jitter: Distribution Section Only

(fVCO = 3.2GHz, fOUTx = 50MHz, Mx = 64)

Phase Noise Floor

RMS Jitter, 12kHz to 20MHz Integration BW

RMS Jitter, ADC SNR Method (Note 15)

–173.8

dBc/Hz

fsRMS

LNORM

Normalized In-Band Phase Noise Floor

ICP = 11.2mA (Note 9, Note 10, Note 11)

–229

dBc/Hz

L1/f

Normalized In-Band 1/f Phase Noise

ICP = 11.2mA (Note 9, Note 12)

–281

dBc/Hz

Spurious

fOFFSET = fPFD, fOUT = 4GHz, PLL Locked

(Note 10, Note 13, Note 14, Note 18)

–100

dBc

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may

cause permanent damage to the device. Exposure to any Absolute Maximum

Rating condition for extended periods may affect device reliability and lifetime.

Note 2. The LTC6952 is guaranteed to meet specified performance limits

over the full operating junction temperature range of –40°C to 125°C. Under

maximum operation conditions, air flow or heat sinking may be required

to maintain a junction temperature of 125°C or lower. It is required that the

Exposed Pad (Pin 53) be soldered directly to the ground plane with an array

of thermal vias as described in the Applications Information section.

Note 3. Absolute maximum time of digital delay is limited to 100µs.

Note 4. For fOUT ≥ 300MHz, analog delay time vs ADELx varies. See

Typical Performance Characteristics plot and the Operations section.

Note 5. All outputs configured as enabled clocks: all PDx[1:0]=0,

EZS_SRQ± pin state=0, SSRQ=0, SRQMD=0, BST=1, PDALL=0,

PDVCOPK=0, PDREFPK=0.

Note 6. Configured with six enabled clock outputs and five SYSREF

outputs with output drivers disabled: PD0, PD2, PD4, PD6, PD8, and

PD10 = 0; PD1, PD3, PD5, PD7, and PD9 = 2; EZS_SRQ± pin state=0;

SSRQ=0; SRQMD=0; BST=1; PDALL=0; PDVCOPK=0; PDREFPK=0

Note 7. For 0.9V < V(CP) < VCP+ – 0.9V.

Note 8. Additive phase noise and jitter from LTC6952 distribution section

only. External VCO, reference and PLL noise is not included.

Note 9. Measured inside the loop bandwidth with the loop locked.

Note 10. Reference frequency supplied by Pascal OCXO-E, fREF = 100MHz,

PREF = 6dBm.

Note 11. Output Phase Noise Floor is calculated from Normalized Phase

Noise Floor by LOUT = LNORM + 10log10(fPFD) + 20log10(fRF/fPFD).

Note 12. Output 1/f Noise is calculated from Normalized 1/f Phase Noise

by LOUT(1/f) = L1/f + 20log10(fRF) - 10log10(fOFFSET).

Note 13. ICP = 11.2mA, fPFD = 100MHz, FILTR = 0, Loop BW = 16kHz,

fVCO = 4GHz

Note 14. Measured using DC2609

Note 15. Additive RMS jitter (ADC SNR method) is calculated by integrating

the distribution section’s measured additive phase noise floor out to fCLK.

Actual ADC SNR measurements show good agreement with this method.

Note 16. Measured with 36” cables from output of DC2609 to

measurement instrument. Cable loss is NOT accounted for in this plot.

Note 17. Statistics calculated from 60 total measured parts from three

process lots.

Note 18. Measured using differential LTC6952 outputs driving LTC6955.

LTC6955 provides differential to single-ended conversion for rejection of

common mode spurious signals. See the Applications Information section

for details.

Note 19. Measured on OUT5. fREF = 100MHz, fVCO = 4400MHz, fOUT =

275MHz, RD = 1

Note 20. Skew is defined as the difference between the zero-crossing time

of a given output and the average zero-crossing time of all outputs.

Note 21. Measured VCO input power is de-embedded to the pins of the

LTC6952.

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